An 8-Bit Superconducting Analog-to-Digital Converter with 10 GHz Input Bandwidth
An 8-Bit Superconducting Analog-to-Digital Converter with 10 GHz Input Bandwidth
批准号:
9360224
负责人:
Paul Bradley
金额:
$6.48万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1994
资助国家:
美国
项目状态:
已结题
起止时间:
1994-03-15 至 1995-02-28
中文摘要
9360224布拉德利HYPRES已经展示了一种6位A/D,在4GHz输入带宽下能够实现约5位的分辨率,在7 GHz输入带宽下能够实现约4位的分辨率。 输入带宽约为10 GHz(3dB点)。 然而,GHz频率下的分辨率受到阈值中与输入信号压摆率成比例的动态失真的限制。 一个新的比较器设计已被模拟,这些失真在很大程度上被取消对称。 仿真表明,如果使用适当的架构,A/D的孔径时间将有一个数量级的改善(在高频下分辨率约增加3位)。 在第一阶段,HYPRES打算制造和测试这种设计,以验证在单个比较器水平上的性能水平。 第二阶段将包括全8位A/D的设计、制造和测试。 ***
英文摘要
9360224 Bradley HYPRES has demonstrated a 6-bit A/D capable of about 5 bits of resolution at 4GHz input bandwidth and about 4 bits of resolution at 7GHz input bandwidth. The input bandwidth is about 10GHz (the 3db point). However, the resolution at GHz frequencies has been limited by dynamic distortion in the thresholds proportional to the input signal slew rate. A new comparator design has been simulated in which these distortions are largely cancelled by symmetry. Simulations indicate an order of magnitude improvement in the aperture time of the A/D if the proper architecture is used (about 3 more bits of resolution at high frequencies). In Phase I, HYPRES intends to fabricate and test this design of verify this level of performance at the single comparator level. Phase II would cover design, fabrication and testing of the full 8-bit A/D. ***
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