Functional Testing of Complex Digital Systems

这项研究是在确保满足标准测试质量目标的同时，直接在功能级别测试VLSI电路的技术。一种称为诱发功能故障（IF）模型的高级故障模型正在研究中。使用该模型，可以将中频故障类与物理故障类耦合，从而在检测到中频故障的同时也检测到物理故障。该方法的优点是易于导出近最小测试集，并且可以在其他电路中重用测试集。正在探索顺序电路的预先计算测试的构造、使用和重用。在这方面，平衡和功能特性在简化测试生成和提高故障覆盖率方面的应用正在研究中。内置的自我测试方法，促进功能测试方法的实施和检测和消除设计错误也在探索中。

This research is on techniques for testing VLSI circuits directly at functional levels, while ensuring that standard testing quality goals are met. A high-level fault model called the induced functional fault (IF) model is being investigated. With this model, an IF fault class can be coupled to a physical fault class so that detection of IF faults ensures detection of physical faults. Advantages of this approach are easy derivation of near- minimal test sets, and reuse of tests in other circuits. The construction, use and reuse of precomputed tests for sequential circuits are being explored. In this regard, the application of balance and functional properties to simplifying test generation and improving fault coverage are being studied. Built-in self- testing methods that facilitate the implementation of functional testing methods and the detection and elimination of design errors are also being explored.