Circuit Analysis, Synthesis and Test under Uncertainty

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Project ID: 0702276Title: Circuit Analysis, Synthesis and Test under UncertaintyPI: John P. Hayes, University of MichiganPI Institution: University of MichiganAbstract: Current trends in the microelectronics industry are making integrated circuits highly vulnerable to failures whose occurrence is inherently uncertain or non-deterministic. This uncertainty is due to the shrinking of circuit components like logic gates into the nanometer range, where they become susceptible to tiny but random manufacturing defects, transient (soft) errors caused by radiation strikes, and quantum-mechanical effects. In circuits embedded in safety-critical applications such as vehicle control, the consequences of such uncertainty can be catastrophic. Most conventional methods of circuit analysis are deterministic, and cannot deal efficiently with problems of the above type. This project seeks a fundamental understanding of uncertainty and its role in logic circuit design and operation. It is pursuing a unified approach to analyzing, designing and testing circuits in the presence of non-deterministic behavior. It will apply and extend several powerful concepts, methods, and software tools developed in our group, such as the QuIDDPro simulator program for quantum circuits. Three major issues will be addressed: (i) development of logic models to represent non-deterministic faults and errors, (ii) circuit synthesis (hardening) methods to achieve specified levels of error tolerance, and (iii) algorithms for simulating and testing circuits in the presence of uncertain behavior. The results obtained should be of direct interest to circuit designers and design tool developers in the U.S. microelectronics industry and in the nascent nanotechnology field.