Circuit Analysis, Synthesis and Test under Uncertainty

项目编号：0702276标题：电路分析，综合和测试uncertainyPI：约翰P.海耶斯，密歇根大学PI机构：密歇根大学摘要：目前的趋势，在微电子工业的集成电路非常容易受到故障的发生是固有的不确定性或非确定性。 这种不确定性是由于逻辑门等电路元件缩小到纳米范围，在纳米范围内，它们容易受到微小但随机的制造缺陷，辐射冲击和量子力学效应引起的瞬态（软）错误的影响。在嵌入安全关键应用（如车辆控制）的电路中，这种不确定性的后果可能是灾难性的。大多数传统的电路分析方法是确定性的，不能有效地处理上述类型的问题。该项目旨在从根本上理解不确定性及其在逻辑电路设计和操作中的作用。它正在寻求一种统一的方法来分析，设计和测试电路中存在的非确定性行为。 它将应用和扩展我们小组开发的几个强大的概念，方法和软件工具，例如量子电路的QuIDDPro模拟器程序。三个主要问题将得到解决：（一）逻辑模型的发展，以代表非确定性的故障和错误，（二）电路综合（硬化）的方法，以实现指定的容错水平，以及（三）算法的模拟和测试电路中存在的不确定行为。所获得的结果应该是直接感兴趣的电路设计师和设计工具开发人员在美国微电子工业和新兴的纳米技术领域。

Project ID: 0702276Title: Circuit Analysis, Synthesis and Test under UncertaintyPI: John P. Hayes, University of MichiganPI Institution: University of MichiganAbstract: Current trends in the microelectronics industry are making integrated circuits highly vulnerable to failures whose occurrence is inherently uncertain or non-deterministic. This uncertainty is due to the shrinking of circuit components like logic gates into the nanometer range, where they become susceptible to tiny but random manufacturing defects, transient (soft) errors caused by radiation strikes, and quantum-mechanical effects. In circuits embedded in safety-critical applications such as vehicle control, the consequences of such uncertainty can be catastrophic. Most conventional methods of circuit analysis are deterministic, and cannot deal efficiently with problems of the above type. This project seeks a fundamental understanding of uncertainty and its role in logic circuit design and operation. It is pursuing a unified approach to analyzing, designing and testing circuits in the presence of non-deterministic behavior. It will apply and extend several powerful concepts, methods, and software tools developed in our group, such as the QuIDDPro simulator program for quantum circuits. Three major issues will be addressed: (i) development of logic models to represent non-deterministic faults and errors, (ii) circuit synthesis (hardening) methods to achieve specified levels of error tolerance, and (iii) algorithms for simulating and testing circuits in the presence of uncertain behavior. The results obtained should be of direct interest to circuit designers and design tool developers in the U.S. microelectronics industry and in the nascent nanotechnology field.