SBIR Phase I: Autometallographic Fabrication of Copper Interconnects

9860786这个小型企业创新第一阶段项目致力于采用一种新的化学方法来制造集成电路用的铜互连。硅/二氧化硅晶片表面将使用电荷写入扫描电子显微镜进行电子束写入图案化，线宽为30 nm；然后在这些线条上装饰来自溶液的带正电荷的1.4 nm金纳米颗粒。这些将是在选择性还原环境中从含铜(II)离子的溶液中自动金相沉积金属铜的种子层。在尝试电子束电荷写入之前，将使用改进的静电复印机或激光打印机优化过程中的各个步骤：将使用非晶态硒或硫化镉转移辊将带电的金团簇转移到膜上，而不是带电的碳，在膜上，图形将通过铜自动金相术可视化。该方法可以制造30 nm(0.03um)宽的铜互连线，大大小于最小电流宽度0.18um，从而获得更高的芯片封装密度，并进一步实现电子元件结构的小型化。这种化学方法还将通过消除光刻胶掩蔽和金属刻蚀步骤来简化IC制造。

9860786 This Small Business Innovation Phase I Project addresses a novel chemical approach to fabricating copper interconnects for integrated circuits. A silicon/silicon dioxide wafer surface will be patterned by electron beam writing using a charge-writing scanning electron microscope with lines 30 nm in width; these will then be decorated with positively charged l.4 nm gold nanoparticles from solution. These will be the seed layers for autometallographic deposition of metallic copper from a solution containing copper (II) ions in a selectively reducing environment. Before electron beam charge-writing is attempted, the individual steps in the process will be optimized using a modified xerographic or laser printer: instead of charged carbon, the amorphous selenium or cadmium sulfide transfer roller will be used to transfer the charged gold clusters onto membranes, where the patterns will be visualized by copper autometallography. The proposed approach may enable the fabrication of copper interconnects 30 nm (O.03 um) in width, significantly smaller than the 0.18 um which is the smallest current width, resulting in higher chip packing density and further miniaturizing the construction of electronic components. This chemical approach will also simplify IC fabrication by removing the photoresist masking and metal etch steps.