Digital Protocol Hierarchy Analysis and Synthesis

系统级综合的一个基本问题是难以将带有预定义协议的接口作为约束。这就导致了一种混合级别的规范方法，这种方法很难创建，通用性有限，难以验证。在本研究中，基于非确定性有限自动机开发了一种通用数字系统设计的替代层次模型，以捕获系统协议和通信约束以及所需的控制和数据流活动。这样的模型适合使用bdd符号遍历技术进行探索。它们为满足复杂通信约束的系统数据流综合提供了一种机制。本项目解决的问题是：a)制定“因果自动机”的有效表示，它表示系统的基本控制和数据流依赖关系；B)制定一个层次抽象的机制来支持大型、复杂的系统；C)在合成中使用隐式状态遍历的剪枝技术；D)分布式控制器综合满足上述分析所提出的调度目标。在这个项目下开发的软件工具正通过互联网分发。

A fundamental problem in system level synthesis is the difficulty ofincorporating interfaces with pre-defined protocols as constraints. Thishas lead to a mixed level specification approach that is difficult tocreate, limited in generality and difficult to verify. In this research, aalternative hierarchical model for a generic digital system design is beingdeveloped based on a non-deterministic finite automata to capture systemprotocol and communication constraints as well as the required control anddata-flow activity. Such models are suitable for exploration using BDDsymbolic traversal techniques. They provide a mechanism for systematicdata-flow synthesis that meets complex communication constraints. Issuesaddressed in this project are: a) formulating an efficient representation fora "causal automata" which represents the essential control and data-flowdependencies for the system; b) formulating a mechanism for hierarchicalabstraction to support large, complex systems; c) pruning techniques onimplicit state traversal when used in synthesis; d) distributed controllersynthesis meeting scheduling goals imposed by the above analysis. Software tools developed under this project are being distributed via theInternet.