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SBIR Phase II: Very Large Scale Integrated (VLSI) Implementations of Neuromorphic Virtual Sensors for Intelligent Diagnostics and Control

SBIR Phase II: Very Large Scale Integrated (VLSI) Implementations of Neuromorphic Virtual Sensors for Intelligent Diagnostics and Control
SBIR 第二阶段:用于智能诊断和控制的神经形态虚拟传感器的超大规模集成 (VLSI) 实现
批准号:
9981852
负责人:
Alexander Moopenn
金额:
$40.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2000
资助国家:
美国
项目状态:
已结题
起止时间:
2000-05-15 至 2003-11-30
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项目摘要

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中文摘要
翻译
该小型企业创新研究第二阶段项目将开发一种新颖、紧凑、低成本的自适应神经处理器芯片,用于下一代低排放“环保”车辆的先进诊断和控制。 这种数字CMOS VLSI电子神经网络设备结合了片上集成的一个完全可重构的前馈/时滞递归神经处理器模块与反向传播通过时间(BPTT)的权重训练模块。 具体地,技术目标是开发适合于直接插入汽车的电子发动机计算机(EEC)的神经处理器芯片。 这种独立的电子神经网络将作为EEC中央处理器(CPU)的协处理器,将其从计算密集型神经任务中卸载,并实现事件率汽车诊断和控制。 神经处理器是可编程的,允许它在运行中执行多个神经网络应用程序;能够为每个应用程序提供事件速率计算吞吐量(50微秒);是片上系统(SOAC)设计(具有片上权重训练的独立神经处理器);并且具有成本效益(5美元/芯片)。 片上自适应不仅能实现自适应控制,而且能解决固定权值网络的问题,即实现电子和机械系统的板上自校准以获得最佳性能.所提出的神经网络形式主义的应用领域包括以下工业部门:(1)汽车工业中低辐射车辆混合动力电动汽车的先进诊断和控制策略&;(2)航空航天工业中喷气发动机的性能和诊断;(3)通信工业中用于上级噪声抑制的蜂窝电话的自适应均衡。
英文摘要
This Small Business Innovation Research Phase II project will develop a novel, compact, low-costadaptive neuroprocessor chip for advanced diagnostics and control in the next generation of low emission"environmentally friendly" vehicles. This digital CMOS VLSI electronic neural network device combines on-chip integration of a fully reconfigurable feed-forward/time-lagged recurrent neuroprocessor module with backpropagation-through-time (BPTT) weight training module. Specifically, the technical objectives are to develop a neuroprocessor chip suitable for direct insertion into an automobile's electronic engine computer (EEC). This stand-alone electronic neural network will function as a co-processor to the EEC's central processing unit (CPU), off-loading it of computationally intensive neural based tasks and enabling event rate automotive diagnostics and control. The neuroprocesor is programmable, allowing it to execute multiple neural network applications on-the-fly; is capable of event rate computational throughput (50 microseconds) per appli-cation; is a system-on-a-chip (SOAC) design (stand-alone neuroprocessor with on-chip weight training); and cost effective ($5/chip). On-chip adaptation will not only enable adaptive control, but will address the problem of fixed weight networks - namely that of enabling on-board self-calibration of electronic and mechanical systems for optimal performance.Applications areas of the proposed neural network formalism cover the following industry sectors: (1) ad-vanced diagnostic and control strategies for low emision vehicles & hybrid electric vehicles in the automotive industry; (2) prognostics and diagnostics of jet engines for the aerospace industry; (3) and adaptive equaliza-tion of cell phones for superior noise rejection in the communication industry.
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会议论文
SBIR Phase II: Parallel Hardware Implementation of the Split and Merge Discrete Wavelet Transform for Wireless Communication
  • 批准号:
    0239330
  • 项目类别:
    Standard Grant
  • 资助金额:
    $50.0万
  • 财政年份:
    2003
  • 负责人:
    Alexander Moopenn
  • 依托单位:
SBIR Phase I: Parallel Hardware Implementation of the Split and Merge Discrete Wavelet Transform for Wireless Communication
  • 批准号:
    0109649
  • 项目类别:
    Standard Grant
  • 资助金额:
    $10.0万
  • 财政年份:
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  • 负责人:
    Alexander Moopenn
  • 依托单位:
SBIR Phase I: Very Large Scale Integrated (VLSI) Implementations of Neuromorphics Virtual Sensors for Intelligent Diagnostics and Control
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    9660637
  • 项目类别:
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  • 资助金额:
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  • 财政年份:
    1997
  • 负责人:
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国内基金
海外基金
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地幔含水相Phase E的温度压力稳定区域与晶体结构研究
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  • 项目类别:
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  • 资助金额:
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  • 批准年份:
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  • 负责人:
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基于数字增强干涉的Phase-OTDR高灵敏度定量测量技术研究