CAREER: Incorporating Technology Scaling into the Design, Evaluation, and Implementation of Computer Architectures

题目：将技术扩展纳入计算机体系结构的设计、评估和实现作者：Stephen W. Keckler，德克萨斯大学奥斯汀分校该职业计划资助的研究目标是研究同时解决深亚微米技术挑战和满足现代动态应用需求的计算机体系结构。最重要的技术挑战是晶体管和导线的发散速度，集成电路中功耗和热量的增加，以及由于特征尺寸减小而导致的瞬态逻辑故障的更高易感性。本研究包括三个部分。首先，为未来的硅制造技术建立了精确的技术模型。重点是通信延迟，沿着电线和微架构结构，如寄存器文件和alu，以及微处理器组件受到外部能源时的可靠性。其次，这些模型被合并到SimpleScalar工具集中，以评估这些新技术约束下的现有体系结构，并为评估未来的体系结构提供一个平台。第三，研究了一个芯片上的多个处理器内核作为构建“片上服务器”的一种手段，并构建了一个容忍瞬态故障的系统。这种多核体系结构的必要特性是能够动态调度作业以满足工作负载的延迟、吞吐量和冗余（可靠性）需求的硬件和系统软件。

ABSTRACTPROPOSAL NUMBER: 9984336TITLE: Incorporating Technology Scaling into the Design, Evaluation, and Implementation of Computer ArchitecturesPI: Stephen W. Keckler, University of Texas at Austin The objectives for the research funded by this CAREER proposal are to investigate computer architectures that simultaneously address the challenges of deep-submicron technologies and meet the needs of modern dynamic applications. The most significant technology challenges are the diverging speeds of transistors and wires, increased power consumption and heat generation in integrated circuits, and higher susceptibility to transient logic faults due to decreasing feature sizes.This research includes three components. First, accurate technology models for future silicon fabrication technologies are developed. The focus is on communication delay, both along wires and within microarchitecture structures such as register files and ALUs and on the reliability of microprocessor components when subjected to external energy sources. Second, these models are incorporated into the SimpleScalar toolset to evaluate existing architectures under these new technological constraints and provide a platform for evaluating future architectures. Third, multiple processor cores on a chip are investigated as a means to construct a "server-on-a-chip" and to build a system that tolerates transient faults. The necessary features of this multicore architecture are hardware and system software that dynamically schedule jobs to meet latency, throughput, and redundancy (for reliability) requirements of the workloads.