ITR: Methodologies for Robust Design of Information Systems under Multiple Sources of Uncertainty

随着CMOS技术进入纳米技术领域，最根本的挑战之一将是由于制造过程中的变化和正常运行期间元件之间的干扰而导致设计行为的不可预测性损失。随着芯片上的特征继续缩小，物理参数的控制将变得越来越难控制，例如晶体管的特征尺寸、其掺杂水平和氧化层厚度，从而导致单个器件的电特性的不确定性显著增加。此外，由于电感和电容耦合以及电源和温度波动等环境因素，设备彼此靠近会引起设备周围元素的显著干扰。不确定性的增加及其严重性将导致纳米芯片设计的可预测性普遍丧失，并将威胁到生产健壮设计的能力。在这个项目中，我们正在开发一个统计框架，用于分析和优化系统性能、功率和功能完整性，以及它们在纳米设计中新出现的权衡。在由于工艺波动和环境干扰而产生变化的情况下，信号本质上是随机的，正如延迟和功率等设计质量的基本衡量标准一样。因此，这项研究正在研究开发性能指标的随机模型，以捕捉它们对各种不确定来源的依赖。新的设计方法将把稳健性作为一种新的设计质量衡量标准，包括延迟、功耗和功能完整性的衡量标准，并将这些设计目标限制在规定的置信度水平。此外，研究团队正在考虑同时优化性能、能量和功能完整性的新方法，以有效地利用纳米设计中这些目标之间的新权衡和相互作用。

As CMOS technology enters the nanometer-regime, one of the most fundamental challenges will result from the loss of predictability of design behavior due to both variations during manufacturing and interferences between components during normal operation. As features on the die continue to shrink, control of the physical parameters, such as the feature size of transistors, their doping levels, and oxide thickness, will become increasingly difficult to control, resulting in dramatic increased uncertainty in the electrical characteristics of individual devices. Also, the close proximity of devices to each other will give rise to significant interference from elements surrounding a device, due to inductive and capacitive coupling, and due to environmental factors, such as power supply and temperature fluctuations. The increase in the number of uncertainties, as well as their severity will result in a general loss of predictability in nanometer-CMOS design and will threaten the ability to produce robust designs. In this project, we are developing a statistical framework for analysis and optimization of system performance, power, and functional integrity, as well as their newly emerging trade-offs in nanometer design. In the presence of variations due to process fluctuations and environmental interferences, signals are inherently stochastic as are the basic measures of design quality, such as delay and power. The research is therefore investigating the development of stochastic models for performance metrics that capture their dependence on the various sources of uncertainty. The new design methodology will focus on robustness as a new measure of design quality, including delay, power consumption and measures of functional integrity, and will allow these design objectives to be constrained at prescribed levels of confidence. Furthermore, the research team is considering new methods for simultaneous optimization of performance, energy, and functional integrity that effectively exploit new trade-offs and interactions between these objectives in nanometer design.