SHF: Small: Minimally Invasive Error Detection/Correction for Runtime Margin Elimination

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Microprocessors form the heart of most electronic systems that pervade our daily life and they are responsible for the bulk of the power consumption of those electronics. In this research, the PIs propose a promising method to significantly reduce that power consumption, using an approach called Razor. One of the issues with modern chips manufactured using silicon semi-conductor processes is that the performance of the electronic components (such as transistors, gate, etc) on these chips has become very unpredictable in terms of their computational speed. This means some chips will run fast while others will run slow. Currently, we address this performance uncertainty by operating all chips at a slow speed that is considered safe for all possible chips. However, this is hugely wasteful for most chips which can operate at a much faster performance. We harness the performance margin of these chips by lowering their operating voltage, such that they still meet the same safe performance constraint, but operate significantly more energy efficiently. It has been demonstrated that this approach can save as much as 50% of the power consumption of an electronic circuit. The proposal suggests new ways for the chip to automatically determine its lowest possible operating voltage while still meeting the needed performance. It does so by progressively lowering the supply voltage till the chip start to fail. These failures are then detected and corrected and tell the voltage control that it has reached the limit of voltage reduction. In this proposal, the PIs outline a new method to perform this error detection and correction in a more efficient manner. The proposed methods, if successful and transferred to industry, could significantly reduce energy consumption of processors and other electronic circuits. The significantly larger energy efficiency of the proposed techniques could bring about a number societal benefits. These technique will enable more effective usage of energy for electronic circuits. Power consumption of electronic circuits (computers, handhelds, servers farms etc.) is currently the fastest growing component of the nation?s overall energy demand. Hence, reducing power consumption of electronics is a critical concern for energy policy and could reduce our dependence on oil and other non-renewable energy sources. In addition, the proposed method will address a critical need to design circuits that are immune to the increasing uncertainty in chips as we scale the silicon technology further. This could play an important role in extending Moore's law of scaling and have significant benefits for the semiconductor industry and the nation?s economy. As part of this research, the PIs will expand our recent practices of engaging with high school students through lab demonstrations and tours to prepare these students for low power computing.