ITR: Concurrent Electro-Thermal Modeling of Ultra-Scaled MOS Technologies

近年来，微电子器件和电路不断小型化。电子器件的典型通道长度目前为180纳米，预计到2008年将降至70纳米，研究实验室已经制造出3-40纳米范围的新器件。尽管电源电压下降，但新兴晶体管设计的功耗预计到本十年末将达到每块芯片160瓦。新兴技术，如绝缘体上硅（SOI）场效应管，由于芯片设计的隔热特性，面临严重增加的自热，并且热诱导故障预计会增加。本提案旨在探讨微电子器件的耦合电热行为的计算。虽然将研究10-180纳米的通道尺度以建立完整的图像，但该提案的重点是了解较小尺度上的热行为。该工作将探索重要的微尺度热现象的影响，如声子边界散射，由热点中弹道声子输运引起的小热源效应，以及声子约束效应，这些现象实质上改变了声子色散曲线并降低了声子群速度。基于分子动力学和玻尔兹曼输运方程的模型将被开发，电子-声子相互作用将由全波段蒙特卡罗模拟器MOCA计算。最后，这些声子输运和热生成模型将与其他器件结构的傅立叶传导模型耦合，以了解新兴超尺度器件的热行为。本提案是响应NSF 02-168信息技术研究，在“小”类别中提交的。该合同由化学和运输系统分部的热传输和热处理项目资助。

In recent years, there has been continuous miniaturization of microelectronic devices and circuits. Typical channel lengths in electronic devices, currently at 180 nm, are expected to fall to 70 nm by the year 2008 and new devices in the 3-40 nm range have already been fabricated in research laboratories. Despite drops in supply voltage, power dissipation in emerging transistor designs is expected to reach 160 W per chip by the end of this decade. Emerging technologies, such as silicon-on-insulator (SOI) FETs, face severely increased self-heating because of the thermally insulating properties of the chip design, and thermally-induced failures are expected to increase. This proposal seeks to explore computationally the coupled electro-thermal behavior of microelectronic devices. Though channel scales ranging from 10-180 nm will be studied to build a complete picture, the emphasis of the proposal is on understanding thermal behavior at the smaller scales. The proposed work will explore the influence of important micro-scale thermal phenomena such as phonon boundary scattering, small heat-source effects due to ballistic phonon transport in the hot spot, and phonon confinement effects, which substantially alter phonon dispersion curves and decrease phonon group velocities. Models based on both molecular dynamics as well as the Boltzmann transport equation will be developed, with electron-phonon interaction being computed by the full-band Monte Carlo simulator MOCA. Finally, these phonon transport and heat generation models will be coupled to Fourier conduction models for other device structures to understand the thermal behavior of emerging ultra-scaled devices. This proposal was submitted in response to NSF 02-168 Information Technology Research, in the "Small" category. The award has been funded by the Thermal Transport and Thermal Processing Program of the Chemical and Transport Systems Division.