SBIR Phase II: Ge-Free Strained Silicon Via dTCE Bonding (Differential Thermal Coefficient of Expansion Bonding)

这个小型企业创新研究二期项目将开发一种工艺，将晶圆键合技术与一种新的应变工艺相结合，以创造一种新的超快硅衬底：应变绝缘体硅（SSOI）。这种基板可以进行普通的IC制造，并且所得到的电路将比非应变SSOI架构所需的功率快30%。该工艺是一种直接的方法，完全超越了最接近的竞争对手，因为在加工的任何部分都不含锗。因此，应变硅不存在应变硅在“应变松弛”硅锗虚拟衬底上生长时经常出现的高浓度的踩位错（105 cm-2）。通过所提出的方法应变的硅保持在其机械弹性区域内，因此没有结构缺陷。所提出的方法采用了行业内已经存在的晶圆键合程序，并修改了这些过程，从而在单个步骤内给出晶圆键合和SOI拉伸的综合结果。直接的方法和单一的过程使得该技术非常便宜。引发的学科是基础表面科学，包括研究物理性质（如表面能）以及化学方面（如维持表面水化和晶圆键合所需的活性表面物质）的研究。商业上，通过这一努力获得的衬底将使超高速硅电子成为可能。拟议的工艺还允许非侵入式辐射硬化，为军事部门提供初步的商业出路。进一步的市场包括主流硅基电子产品；有效的新型宿主材料，其速度更具有砷化镓等材料的特性，最突出的是，非常低功耗的电子器件。

This Small Business Innovative Research Phase II project will develop a process that integrates wafer bonding technology with a novel straining process to create a new ultra fast silicon substrate: Strained-Silicon-On-Insulator (SSOI). This substrate can undergo normal IC fabrication and resulting circuits will be 30% faster at half the power required for comparative non-strained- SSOI architectures. The process is a direct approach and entirely surpasses the nearest competition as there is no germanium in any part of the processing. As a result the strained silicon is free from the high concentration of treading dislocations (105 cm-2) always present when strained-silicon is grown on "strain-relaxed" silicon germanium virtual substrates. The silicon strained by the proposed method is maintained within its mechanically elastic region and thus is free from structural imperfections. The proposed method engages wafer bonding procedures already in place within the industry and modifies those processes to give a combined result of wafer bonding and SOI straining within a single step. The direct approach and single processmakes the technique very inexpensive. The discipline evoked is fundamental surface sciencewhich involves investigation of both physical properties such as surface energies along withchemical aspects such as maintaining surface hydration and active surface species required forwafer bonding.Commercially, the substrates available via this effort will make possible ultra fast silicon electronics. The proposed process also allows for non-intrusive radiation-hardening, giving initial commercial outlet in the military sector. Further markets includemainstream silicon-based electronics; effectively new host materials with speeds morecharacteristic of materials such as gallium arsenide and most salient, very low power electronics.