SBIR Phase II: Next Generation Binary Decision Diagrams (BDD)-Based Logic Optimization System

这个小型企业创新研究第二阶段项目的目标是在很短的CPU时间内合成超大规模集成电路（IC）和片上系统（SoC）。预期的短CPU时间来自于依赖于二元决策图（BDD），它取代了当今工具中普遍使用的传统代数表示。SBIR项目第二阶段致力于进一步开发Swift的能力，并将其与一些商业工具相结合。开发计划包括新的功能，例如通过添加新的逻辑转换来提高面积，以及通过实现新的分解算法来提高处理速度。该项目将大大推进现代逻辑优化理论，并促进工业界和学术界对它的理解。它还将促进在现有的电子设计自动化（EDA）系统中纳入更快的逻辑综合工具。这将有利于国家EDA行业，并帮助美国在这个具有重要战略意义的市场上保持其对外国竞争对手的竞争优势。

This Small Business Innovation Research Phase II project targets the synthesis of very large-scale integrated circuits (ICs) and systems on chip (SoC) in very short CPU time. The expected short CPU time comes from relying on binary decision diagram (BDDs) that replaced the traditional algebraic representations used pervasively in present-day tools. This Phase II SBIR project is devoted to developing further the capabilities of swift and integrating it with a number of commercial tools. The development plan includes new capabilities, such as improving area by adding new logic transformations and improving the speed of processing by implementing novel decomposition algorithms. This project will significantly advance the theory of modern logic optimization and promote its understanding in industry and academia. It would also promote the inclusion of faster logic synthesis tools in existing Electronic Design Automation (EDA) systems. It would benefit the national EDA industry, and help the US to maintain its competitive advantage against its foreign competitors in this strategically important market.