SBIR Phase I: Improvements in Reliability of Semiconductor Products Using Magnetic Current Imaging for Fault Isolation of Open Circuits

这个小型企业创新研究(SBIR)第一阶段项目将扩展磁流成像的能力，以检测精度为30微米的半导体封装中的开路故障。在封装中遇到的最大、最困难的问题是由于前沿设计中日益缩小和复杂的技术而导致的电子开路。唯一可用的技术是实际分辨率为1-2 mm的时域反射仪和耗时的逐层去处理。迫切需要一种更快、非破坏性和更可靠的技术，该技术能够在与今天的封装水平布线相称的水平上定位开口，间距为30微米，并且能够延伸到未来接近10微米的布线间距。建议使用磁流成像和SQUID传感器来解决这一关键需求。将尝试两种方法：一种是提高设备的频率检测极限，以在缺陷位置检测高频信号。二是利用SQUID检测缺陷发出的高频信号。预计这两种方法中的一种或两种能够以大约30微米的分辨率检测开路。在商业上，半导体行业迫切需要在分辨率低于30微米的封装中定位埋藏的开路缺陷。这项拟议的技术的目标是30微米的分辨率，以填补封装故障隔离技术的已知空白。对于半导体公司来说，这将使封装制造现场能够隔离公开的缺陷，并改进他们的制造工艺，以最大限度地减少或快速消除这些缺陷，以便他们能够更快地将高质量、可靠的产品推向市场。对美国来说，这意味着更快地引进先进的电子产品，这将对所有行业产生广泛影响，并最终提高生活质量和劳动生产率。

This Small Business Innovation Research (SBIR) Phase I project will extend the capabilities of magnetic current imaging to detect open failures in semiconductor packages with an accuracy of 30 microns. The largest, most difficult problem encountered in packages is electrical opens due to increasing shrinking and complex technology in leading edge designs. The only available techniques are time domain reflectometry with practical resolution of 1-2 mm and time consuming layer-by-layer deprocessing. There is a critical need for a faster, non-destructive and more reliable technique capable of locating opens at a level commensurate with todays package level wiring, 30 micron pitch and able to extend to future wiring pitches approaching 10 micron. It is proposed to use magnetic current imaging with a SQUID sensor to solve this critical need. Two approaches will be attempted: one is to increase the frequency detection limit of the equipment to detect high frequency signals at the defect location. The second is to use the SQUID to detect radio frequency signal emitted by the defect at higher frequency signals. It is expected that one or both of these approaches to be able to detect opens with a resolution of about 30 micron.Commercially, the semiconductor industry has a critical need for localization of buried open defects in packages with resolution below 30 microns. The proposed technology is targeting a 30 micron resolution to fill a known gap in fault isolation technology for packaging. For the semiconductor companies it will enable the packaging manufacturing sites to isolate open defects and improve their manufacturing processes to minimize or eliminate these defects quickly so that they can get high quality reliable products to market faster. For the nation, it means faster introduction of advanced electronics that will have a broad impact across all industries and ultimately improve quality of life and labor productivity.