CAREER: Understanding, Estimating, and Reducing Processor Design Complexity
CAREER: Understanding, Estimating, and Reducing Processor Design Complexity
批准号:
0546819
负责人:
Jose Renau
金额:
$40.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2006
资助国家:
美国
项目状态:
已结题
起止时间:
2006-03-15 至 2012-02-29
中文摘要
职业生涯:了解、评估和降低处理器设计复杂性这个职业项目的目标是了解、评估和降低处理器设计复杂性。该项目将制定处理器设计复杂性的三组分复杂性衡量标准:说明设计中不同组件的贡献的程序、使用非线性混合效应模型对实验措施进行准确的统计回归、以及考虑到不同团队的生产率的生产率调整。一旦指标被开发出来,降低处理器设计复杂性的新方法将被开发出来。由于微处理器设计的快速增长的复杂性,目前顶级处理器的开发成本令人震惊。随着更大和更复杂的处理器的设计,估计设计和验证时间变得越来越困难。处理器设计成本估计仍然没有量化的方法,在测量、理解和估计所需工作方面的工作很少。该项目将通过制定适当的量化指标来解决这些问题。
英文摘要
CAREER: Understanding, Estimating, and Reducing Processor Design Complexity The goal of this CAREER project is to understand, estimate, and reduce processor design complexity. The project will develop three-component complexity metrics for processor design complexity: a procedure to account for the contributions of the different components in the design, accurate statistical regression of experimental measures using a nonlinear mixed-effects model, and a productivity adjustment to account for the productivities of different teams. Once the metrics are developed, new approaches to reduce processor design complexity will be developed.Current development costs for top of the line processors are staggering due to the rapidly-growing complexity of microprocessor design. As larger and more complex processors are designed, it is becoming increasingly difficult to estimate design and verification times. Processor design cost estimation still does not have a quantitative approach, and there is little work on measuring, understanding, and estimating the effort required. The project will address these issues be developing appropriate quantitive metrics.
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