CAREER: Computer Architecture Foundations for 3D-Integrated High-Performance Microprocessors
CAREER: Computer Architecture Foundations for 3D-Integrated High-Performance Microprocessors
批准号:
0643500
负责人:
Gabriel Loh
金额:
$40.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2007
资助国家:
美国
项目状态:
已结题
起止时间:
2007-05-01 至 2011-04-30
中文摘要
现代微处理器设计受到芯片内的线延迟的严重限制。 就像从建筑物的一端走到另一端一样,在芯片上发送信号需要时间和能量。 超过一定的大小,建筑师建造额外的楼层,这可以帮助减少居住者走过的距离。 以类似的方式,未来的微处理器将由排列在三维堆栈中的多层电路组成。 这项技术有可能大大减少整个芯片的导线长度,从而提高性能,同时降低功耗。 摩天大楼的发展需要新的建筑体系结构的发明;同样,未来的3D微处理器也需要新的计算机体系结构来充分利用这项新技术。 该项目将研究3D集成技术对传统单核和多核处理器以及新兴的“众核”处理器(一个芯片上的许多10个甚至100个核心)的影响。 通过这些研究,将开发专门针对3D技术的新架构。 他们的关键研究挑战包括回答如何最好地设计新架构以从技术中提取性能和功率优势,如何科普堆叠多层高活性电路可能产生的潜在热问题,以及如何使用不同类型的器件(例如,RF/模拟、DRAM、闪存、CMOS)。
英文摘要
Modern microprocessor designs are severely limited by wire delays within the chip. Like walking from one end of a building to the other, sending signals across a chip requires time and energy. Beyond a certain size, architects of buildings construct additional floors which can help reduce the distances traversed by the occupants. In a similar fashion, microprocessors of the future will be composed of multiple layers of circuitry arranged in a three-dimensional stack. This technology has the potential to significantly reduce the lengths of wires throughout the chip which can lead to an increase in performance with a simultaneous reduction in power consumption. The development of skyscrapers required the invention of new building architectures; likewise the 3D microprocessors of tomorrow will need new computer architectures to fully exploit this new technology. This project will research the impact of 3D integration technology on conventional single-core and multi-core processors as well as emergent "many-core" processors (many 10's or even 100's of cores on a chip). From these studies, new architectures specifically targeting a 3D technology will be developed. They key research challenges include answering how to best design the new architectures to extract performance and power benefits from the technology, how to cope with potential thermal problems that may arise from stacking multiple layers of highly active circuits, and how to build a compelling system using stacks of different types of devices (e.g., RF/analog, DRAM, flash, CMOS).
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
Economic Mechanisms for Dynamic Resource Patitioning in Multi-Core Processors
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批准号:0702275
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项目类别:Standard Grant
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资助金额:$17.27万
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财政年份:2007
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负责人:Gabriel Loh
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依托单位:
国内基金
海外基金
基于多重计算全息片(Computer-generated Hologram,CGH)的光学非球面干涉绝对检验方法研究
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批准号:62375132
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项目类别:面上项目
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资助金额:54.00万元
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批准年份:2023
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负责人:马骏
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依托单位:
Journal of Computer Science and Technology
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批准号:61224001
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项目类别:专项基金项目
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资助金额:20.0万元
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批准年份:2012
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负责人:万晓霰
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依托单位:
Journal of Computer Science and Technology
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批准号:61040017
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项目类别:专项基金项目
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资助金额:4.0万元
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批准年份:2010
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负责人:万晓霰
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依托单位: