NER: Modeling and Design of Nanotube-Based On-Chip Interconnect Solutions for Future VLSI Applications

NER：面向未来超大规模集成电路应用的基于纳米管的片上互连解决方案的建模和设计(ECCS-0709334)目的：在未来的纳米级集成电路中，工艺规模和工作频率的提高将加剧当今设计中已经困扰着互连的电阻率、电迁移和延迟问题。随着cmos技术被推向其基本的物理极限，片上通信需要替代技术。在这个项目中，我们将探索基于碳纳米管的互连解决方案，用于未来的VLSI应用。智能优点：金属碳纳米管由于其大的导电性和载流能力，有望取代片上铜互连。我们将研究和开发等效电路模型，以促进基于纳米管的互连解决方案的开发。利用所提出的模型，我们将检验纳米管互连结构在未来工艺技术中的性能和可靠性。基于纳米管的互连解决方案有可能为大量VLSI应用的下一代集成电路带来革命性的变化。更广泛的影响：此外，与拟议研究相关的教育和推广计划，针对少数族裔、本科生和研究生，将有助于促进与碳纳米管和纳米集成电路相关的科学原理。

NER: Modeling and Design of Nanotube-Based On-Chip Interconnect Solutions for Future VLSI Applications (ECCS-0709334)Objective:In future nanoscale integrated circuits, process technology scaling coupled with increasing operating frequencies will exacerbate the resistivity, electromigration, and delay problems that already plague interconnect in today's designs. As CMOS technology is pushed to its basic physical limits, alternate technologies are required for on-chip communication. In this project, we will explore carbon nanotube-based interconnect solutions for future VLSI applications.Intellectual Merit: Metallic carbon nanotubes are a promising replacement for on-chip copper interconnect due to their large conductivity and current carrying capabilities. We will investigate and develop equivalent circuit models to facilitate the development of nanotube-based interconnect solutions. Using the proposed models, we will examine the performance and reliability of nanotube interconnect structures in future process technologies. Nanotube-based interconnect solutions have the potential to revolutionize next generation integrated circuits for a large array of VLSI applications. Broader Impacts:In addition, the educational and outreach programs associated with the proposed research, which target minority, undergraduate, and graduate students, will be instrumental in promoting the scientific principles related to carbon nanotubes and nanoscale integrated circuits.