SBIR Phase I: Ultra-Low k Interlayer Dielectrics for 22 nm Technology Node and Beyond

这个小型企业创新研究第一阶段项目旨在开发一种新技术，用于制造用于22 nm技术节点及更高技术节点的前沿逻辑器件的超低介电常数材料(e 2.0)。人们普遍认识到，随着集成电路的进一步小型化，目前用于90和65 nm技术节点中的材料将不会无休止地保持有效，因为它们不具有足够低的e值，或者因为它们的形态特征不会为集成提供可接受的机械性能。本项目将探索一种基于自下而上合成蜂窝状纳米结构薄膜的层间介电材料的新方法，其中致孔成分预先嵌入到纳米细胞中，并可以严格控制分解。这提供了几何精确排列的闭合孔，直径可在1-5 nm范围内随意选择，精度为+/-1 nm，并由1-3 nm的有机-无机薄壁分隔。拟议的研究计划将包括三个主要部分：(I)自下而上的纳米级前驱体薄膜的合成，(Ii)纳米多孔电介质的控制制备，以及(Iii)所得产品的表征。虽然这一第一阶段计划的直接焦点将是22 nm节点的层间介质，但它也将对这一阶段之后的努力以及硅基计算机的最终极限产生重大影响。这项计划还将大大有助于扩大我们对纳米结构材料和纳米技术的总体知识和理解。第一阶段的结果将提供概念验证数据，用于设计优化和进一步改进这一工艺和材料的方案。

This Small Business Innovation Research Phase I project aims to develop a new technology for manufacturing ultra-low dielectric constant materials (e 2.0) for leading-edge logic devices for the 22 nm technology node and beyond. It is widely recognized that materials presently used in the 90 and 65 nm technology nodes will not remain endlessly effective with further miniaturization of integrated circuits either because they do not have sufficiently low e values, or because their morphological features will not provide acceptable mechanical properties for integration. This project will investigate a new approach to interlayer dielectrics based on the bottom-up synthesis of honeycomb-like nano-structured films in which porogen component is pre-built into the nano-sized cells and can be decomposed in a strictly controlled manner. This provides geometrically precisely organized closed pores with diameters selected at will from the range of 1-5 nm with precision of +/- 1 nm and separated by the 1-3 nm thin organo-inorganic walls. The proposed research program will have three major parts: (i)bottom-up synthesis of the nano-scaled precursor films, (ii) controlled preparation of nano-porous dielectrics, and (iii) characterization of the obtained products. While the immediate focus of this Phase I program will be on the interlayer dielectrics for the 22 nm node, it will also have a major impact on efforts beyond this stage and to the ultimate limits of silicon-based computers. This program will also significantly contribute to expanding our overall knowledge and understanding of nano-structured materials and nanotechnology in general. The Phase I results will provide proof-of-concept data that will be used to design a program for optimization and further improvement of this process and materials.