CAREER: Nano-Centric Design Methodology for Nanoscale FPGAs
CAREER: Nano-Centric Design Methodology for Nanoscale FPGAs
批准号:
0746608
负责人:
Deming Chen
金额:
$40.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2008
资助国家:
美国
项目状态:
已结题
起止时间:
2008-08-01 至 2014-07-31
中文摘要
CCF - 0746608 PI name:德明Chen Title:CAREER:Nano-Centric Design Methodology for Nanoscale FPGA机构:University of Illinois at Urbana Champaign摘要:由于基本的物理和经济限制,传统的自上而下的制造面临着严峻的挑战。自下而上的方法,其中集成功能器件结构是由化学合成的纳米级构建块组装而成的,如碳纳米管(CNT)和纳米线,有可能彻底改变未来电子系统的制造。这种纳米系统本质上在结构上非常规则,因此适合于类似于现场可编程门阵列(FPGA)的实现。纳米电子电路总是有一定比例的缺陷,以及纳米材料的具体变化和以上的工艺变化引入光刻。使用简化的纳米器件假设和传统的缩放设计流程将导致次优和不切实际的nanoFPGA设计以及不准确的系统评估结果。为了让纳米技术实现其承诺,我们需要系统地从设备一直到系统了解并结合纳米特定的设计技术,例如纳米系统建模、统计方法和容错设计。受此观察的启发,该CAREER计划为纳米级FPGA提出了一种基本的,系统的和以纳米为中心的设计方法。该提案包括以下四个集成设计方面:1)图案化:设计新颖可靠的架构图案,例如新的基于CNT的一次性可配置FPGA; 2)建模:开发新的器件/导线/电路模型,考虑纳米材料特定的变化,制造限制和缺陷; 3)合成:从行为级到物理设计级,重点关注新型纳米中心合成技术; 4)评估:构建一个新的参数化nanoFPGA评估/探索引擎NanoEngine。PI计划开发一门新的跨学科课程,包括纳米材料制造,纳米电子原理,可编程IC和CAD。PI已经并将继续通过简短的系列讲座,工程开放日和IEEE教师在职计划向K-12学生提供微/纳米电子教育。他还将与大学组织,如妇女在工程,以增加代表性不足的群体,特别是女学生的参与。这个项目是特别引人注目的本科生,谁被吸引到新技术,并可能成为纳米电子行业的未来领导者。
英文摘要
CCF - 0746608 PI name: Deming ChenTitle: CAREER: Nano-Centric Design Methodology for Nanoscale FPGAsInstitution: University of Illinois at Urbana ChampaignABSTRACT:Conventional top-down manufacturing faces serious challenges due to fundamental physical and economical constraints. Bottom-up approaches, in which integrated functional device structures are assembled from chemically synthesized nanoscale building blocks, such as carbon nanotubes (CNT) and nanowires, have the potential to revolutionize the fabrication of electronic systems for the future. Such nanosystems are by their nature very regular in structure and, therefore, suitable to implementation similar to Field Programmable Gate Arrays (FPGAs). Nanoelectronic circuits always have a certain percentage of defects as well as nanomaterial-specific variations over and above process variations introduced by lithography. Using simplified nanodevice assumptions and traditional scaled design flows will lead to suboptimal and impractical nanoFPGA designs and inaccurate system evaluation results. For nanotechnology to fulfill its promise, we need to understand and incorporate nano-specific design techniques, such as nanosystems modeling, statistical approaches and fault tolerant design, systematically from devices all the way up to systems. Motivated by this observation, this CAREER program proposes a fundamental, systematic and nano-centric design methodology for nanoscale FPGAs. The proposal includes the following four integrated design aspects: 1) Patterning: Designs novel and reliable architecture patterns, such as a new CNT-based one-time-configurable FPGA; 2) Modeling: Develops new device/wire/circuit models considering nanomaterial-specific variations, manufacturing limitations, and defects; 3) Synthesizing: Focuses on novel nano-centric synthesis techniques from the behavior level down to the physical design level; and 4) Evaluating: Builds a new parameterized nanoFPGA evaluation/exploration engine NanoEngine. The PI plans to develop a new interdisciplinary course incorporating nanomaterials fabrication, nanoelectronic principles, programmable ICs, and CAD. The PI has worked and will continue to reach out to K-12 students for micro/nano electronics education through short lecture series, Engineering Open House, and IEEE Teacher In-Service programs. He will also work with university organizations, such as Women in Engineering, to increase the participation of under-represented groups, especially female students. This project is especially compelling to undergraduate students, who are attracted to new technologies and may become the future leaders of nanoelectronic industry.
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Collaborative Research: From High-level Synthesis to Layout: a Cross-layer Methodology for Large-scale Reliable IC Design
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批准号:1255846
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项目类别:Continuing Grant
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资助金额:$10.5万
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财政年份:2013
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负责人:Deming Chen
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依托单位:
国内基金
海外基金
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