CAREER: Programming Interfaces and Hardware Designs for a Polymorphic Multicore Cache Architecture

半导体行业遭遇了芯片级别的功耗和冷却限制，减缓了时钟频率的前进，迫使行业转而押注于多核，以提供节能的性能可扩展性。尽管多核趋势给应用程序开发人员带来了艰巨的挑战，但它也创造了传统多芯片多处理器中无法获得的新机会：片上通信和计算的相对成本发生了巨大变化，使得应用程序设计能够实现紧密耦合的线程和频繁的共享，这将证明传统多处理器的延迟和带宽令人望而却步。不幸的是，当前的多核存储系统不灵活且不适合支持协调执行，因为它们没有提供用于核到核通信或优化芯片上的数据放置的直接手段。此外，不同应用程序的芯片内访问模式差异很大--没有一刀切的静态缓存架构。为了解决这些不足，该项目寻求开发多态多核缓存体系结构(PMCA)-一种模块化的片上缓存设计，其中软件配置原始硬件机制，以提供适合特定工作负载的缓存体系结构。PMCA的理念将沿着三条战线进行：第一，PMCA？S的建筑界面和行为设计通过一个完整的系统，将进行精确的周期模拟。其次，研究了PMCA的语言级构造、软件管理策略，以及通过基于FPGA的功能仿真实现PMCA的虚拟化。第三，将研究各种设计在性能、面积和功率方面的权衡。

The semiconductor industry has hit a wall - chip-level power and cooling constraints have slowed the march of clock frequency, forcing industry to instead bet on multicore to provide energy-efficient performance scalability. Although the multicore trend poses daunting challenges for application developers, it also creates new opportunities unavailable in traditional multi-chip multiprocessors: the drastic change in the relative costs of on-chip communication and computation enable application designs with tightly-coupled threads and frequent sharing that would prove latency- and bandwidth-prohibitive in traditional multiprocessors. Unfortunately, current multicore memory systems are inflexible and poorly-suited to support coordinated execution, as they provide no direct means for core-to-core communication or to optimize data placement on chip. Moreover, intra-chip access patterns vary drastically across applications - there is no one-size-fits-all static cache architecture. To address these deficiencies, this project seeks to develop a Polymorphic Multicore Cache Architecture (PMCA) - a modular on-chip cache design where software configures primitive hardware mechanisms to provide a cache architecture suited to a specific workload. The PMCA concept will be pursued along three fronts: First, PMCA?s architectural interface and behavioral design through a full system, cycle accurate simulation will be conducted. Second,language level constructs, software management policies, and virtualization of PMCA through FPGA based functional emulation will be investigated. Third, trade-offs in performance, area, and power for various designs will be examined.