Scalable Bilinear Algorithms and Architectures for Convolutions and Transforms

该奖项是根据2009年美国复苏和再投资法案（公法111-5）资助的。本研究的目标是开发和实现可扩展的双线性算法，用于真实的域和有限域上的卷积和变换。 该方法首先通过识别循环结构和代数地组合相关的循环卷积算法来获得双线性算法，然后显著地降低它们的加性复杂度。该项目的智力价值在于用于卷积和变换的可扩展的双线性算法，其适合于高效的硬件实现，以及一种新颖的公共子表达式消除算法，该算法大大降低了大范围双线性算法的加法复杂度。 本论文的研究主要围绕四个方面展开：（1）真实的域上卷积和变换的可扩展双线性算法，（2）有限域上卷积和离散傅立叶变换的可扩展双线性算法，（3）加法复杂度的降低，（4）加法复杂度的降低，（5）加法复杂度的降低，（6）加法复杂度的降低，（7）加法复杂度的降低，（8）加法复杂度的降低，（9）加法复杂度的降低，（9）加法复杂度的降低，（10）加法复杂度的降低，（10）加法复杂度的降低，（11）加法复杂度的降低，（11）加法复杂度的降低，（12）加法复杂度的降低，（13）加法复杂度的降低，（14）加法复杂度的降低，（15）加法复杂度的降低，（16）加法复杂度的降低，（17）加法复杂度的降低，（18）加法复杂度的降低，（19）加法复杂度的以及（4）算法/架构协同设计方法下的硬件实现。可缩放的双线性算法在诸如信号处理、电信和多媒体系统的广泛应用中具有显著的潜在影响。 该项目将研究与教育和推广活动相结合，以教育大规模集成（VLSI）信号处理跨学科领域的广泛学生，该领域将集成电路硬件设计与信号处理联系起来。 该项目还为研究生和本科生提供研究机会和实践系统设计经验，并激励当地高中生接受科学和工程方面的高等教育。

This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).The objective of this research is to develop and implement scalable bilinear algorithms for convolutions and transforms over the real field and finite fields. The approach is to first obtain bilinear algorithms by identifying cyclic structures and combining relevant cyclic convolution algorithms algebraically, and then reduce their additive complexities significantly.The intellectual merit of this project lies in scalable bilinear algorithms for convolutions and transforms, which are suitable for efficient hardware implementations, and a novel common sub-expression elimination algorithm that greatly reduces the additive complexities of a wide range of bilinear algorithms. The research is organized under four themes: (1) scalable bilinear algorithms for convolutions and transforms over the real field; (2) scalable bilinear algorithms for convolutions and discrete Fourier transform over finite fields; (3) reduction of additive complexities; and (4) hardware implementation under the algorithm/architecture co-design methodology.With respect to broader impacts, scalable bilinear algorithms have significant potential for impact on a wide range of applications, such as signal processing, telecommunications, and multimedia systems. The project integrates research with education and outreach activities to educate a wide spectrum of students in the interdisciplinary area of very large-scale integrated (VLSI) signal processing, which links integrated circuit hardware design with signal processing. The project also provides research opportunities and hands-on system design experience to graduate and undergraduate students and motivates local high school students to pursue higher education in science and engineering.