SBIR Phase I: TriStar, An Algebraic High Performance Communications Signal Processor

这个小型企业创新研究(SBIR)第一阶段项目将研究和开发一项创新和革命性的核心无线基础设施技术。无线技术几乎影响到生活的方方面面，需要一种新的高性能、低延迟、低功耗的基础设施技术才能更上一层楼。如今，通信和数字信号处理器(DSP)通过创建多处理器设计来实现高性能水平；因此，这些系统可能过于复杂、昂贵和耗电。拟议的项目利用了高性能通信和DSP处理器设计；这一设计基于对计算机算法的理解，而不是大量注入硬件。第一阶段项目将(1)开发一个数学框架，在该框架中可以推导出具有用户定义的一个或多个关键频率的物理可实现的无乘法器TriStar滤波器和变换；(2)开发可针对速度、功率、复杂性和/或延迟优化TriStar解决方案的设计方法；以及(3)使用强大的EDA工具量化和验证性能和封装收益。与目前S最好的无线解决方案相比，无乘法器系统的硬件实现将实现更高的性能、成本和功耗。该项目的更广泛影响/商业潜力体现在快速增长的2000亿美元(美国)无线市场，这是一个技术需求和要求迅速增长的市场。拟议的技术代表着基础或基础设施技术的重大进步，这些技术是广泛的通信、传感器、仪器和遥测应用的基础。它为这些应用带来了多重效率，提供了更高的性能、更低的功耗、更小的硅片面积和硅片成本以及运行时的可重构性。建议的技术提供了这些基本的经济理由，同时提供了诸如延长产品生命周期和提高产品性能等改变游戏规则的好处，这些好处可以用消费者喜欢的属性来表示：更长的电池寿命和更快的无线数据速率。商业产品发布将以目标客户群喜欢的形式发布，即准备用于半导体芯片制造的半导体知识产权(IP)核心。因此，客户可以快速且经济实惠地开发和评估新的无线解决方案和科学仪器，为他们的客户和公众提供更实惠、更强大和更可靠的无线系统、设备和附件。

This Small Business Innovation Research (SBIR) Phase I project will research and develop an innovative and revolutionary core wireless infrastructure technology. Wireless technologies impact virtually every aspect of life and require a new high performance, low latency, low power infrastructure technology to move to the next level. Today, communications and digital signal processors (DSPs) achieve high performance levels by creating multi-processor designs; as a consequence, these systems can be overly complex, costly, and power consuming. The proposed project utilizes a high-performance communications and DSP processor design; one based on an understanding of computer arithmetic rather than a massive infusion of hardware. The Phase I project will (1) develop a mathematical framework in which physicallyrealizable multiplier-less TriStar filters and transforms having user defined critical frequency or frequencies can be derived, (2) develop a design methodology that can optimize TriStar solutions for speed, power, complexity and/or latency; and (3) quantify and validate the performance and packaging gains using powerful EDA tools. The hardware implementation of the resulting multiplier-free system will achieve superior performance, cost, and power consumption when compared to today?s best wireless solutions.The broader impact/commercial potential of this project is found in the rapidly increasing $200B (US) wireless market, a market with rapidly increasing technological demands and requirements. The proposedtechnology represents a major advance in the foundation or infrastructure technology that underlies a wide range of communications, sensor, instrumentation, and telemetry applications. It brings multipleefficiencies to these applications, delivering improved performance, reduced power, reduced silicon area and silicon expense, and run-time reconfigurability. The proposed technology delivers these basic economicjustifications while simultaneously delivering such game-changing benefits as extended product life cycle, and improved product performance which can be expressed in attributes consumers prize: longer battery life and faster wireless data rates. Commercial product release will be in a form preferredby the targeted customer-base, namely as semiconductor intellectual property (IP) cores ready for use in semiconductor chip manufacturing. As a result, customers can rapidly and affordably develop and evaluate new wireless solutions and scientific instruments that provide their customers and the public with more affordable, capable, and reliable wireless systems, devices, and accessories.