SHF: Small: Interconnection Networks: Topological Properties and Communication Algorithms

最近的技术进步使得设计具有数千个处理器的并行计算机变得更加可行。 因此，研究连接处理器的不同网络是高性能计算机设计的一个组成部分。 本项目将从网络效率的角度研究三个重要网络族的互连拓扑。 要考虑的问题的类型的例子包括：处理器之间的有效通信的算法;稀缺或有限资源的有效放置;以及在节点/链路故障的存在下的容错通信算法。除了促进研究生培训，该项目将提供详细的见解，了解各种权衡设计大型多处理器架构的互连网络。

Recent advances in technology have made the design of parallel computers with thousands of processors more feasible. Consequently, the study of different networks for linking processors is an integral part of the design of high-performance computers. This project will study the interconnection topologies of three important families of networks from the point of view of network efficiency. Examples of the type of problems to be considered include: algorithms for efficient communication among processors; effective placement of scarce or otherwise limited resources; and fault-tolerant communication algorithms in the presence of node/link failures. In addition to facilitating graduate training, the project would provide detailed insight for understanding various tradeoffs in designing interconnection networks for large multiprocessor architectures.