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SBIR Phase II: Structures for reduced critical current to enable Spin Torque Magnetoresistive Random Access Memory

SBIR Phase II: Structures for reduced critical current to enable Spin Torque Magnetoresistive Random Access Memory
SBIR 第二阶段:降低临界电流的结构,以实现自旋转矩磁阻随机存取存储器
批准号:
1058552
负责人:
Nicholas Rizzo
金额:
$49.93万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2011
资助国家:
美国
项目状态:
已结题
起止时间:
2011-04-01 至 2013-03-31

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中文摘要
翻译
该小型企业创新研究(SBIR)第二阶段项目旨在展示一种高性能的自旋扭矩磁阻随机存取存储器(ST-MRAM)。ST-MRAM技术提供了非易失性、高密度、高速度和低功耗的强大组合。ST-MRAM商业化的主要障碍是用于编程磁隧道结(MTJ)位的写入电流太大。大的写入电流可能导致隧道势垒击穿,从而损害存储器的可靠性。此外,较大的写入电流需要在每一位之下有较大的选择晶体管,从而防止高密度。在第一阶段项目中,已经成功地演示了一种写入电流足够低的MTJ比特设计。在这个二期工程中,将使用这种改进的BIT设计开发一个大型、高密度ST-MRAM演示电路。将评估几种具有更高速度、更高密度和更低功耗潜力的新电路设计方法。该电路将提供优化比特设计所需的比特统计数据,并将成品率提高到高度可靠的商用ST-MRAM所需的水平。该项目的更广泛/商业影响将是使ST-MRAM能够实现商业应用的潜力。Togger MRAM已经在独立存储器市场找到了许多应用,包括网络、工业控制、数据服务器系统、军事、航空航天工业等。然而,为了充分发挥MRAM的商业潜力,需要更高的密度和更低的功耗。高密度意味着更低的成本。在便携式电子产品甚至企业计算等领域,降低功耗日益受到重视。ST-MRAM技术通过在单个存储器中结合非易失性、高密度、高速度、低功耗、无限耐用性和可扩展性,具有满足这些需求的潜力。
英文摘要
This Small Business Innovation Research (SBIR) Phase II project aims to demonstrate a high-performance spin torque magnetoresistive random access memory (ST-MRAM). ST-MRAM technology promises a powerful combination of non-volatility, high density, high speed, and low power. The major impediment to commercializing ST-MRAM has been that the write current for programming the magnetic tunnel junction (MTJ) bits are too large. Large write current can cause tunnel barrier breakdown, thereby compromising memory reliability. Additionally, large write current requires large select transistors beneath each bit, preventing high density. In Phase I project, an MTJ bit design with a low enough write current has been successfully demonstrated. In this Phase II project, a large, high-density ST-MRAM demonstration circuit will be developed using this improved bit design. Several novel circuit design approaches that have potential for higher speed, higher density and lower power will be evaluated. The circuit will provide the bit statistics needed to optimize the bit design and enhance the yield to the level required for a highly reliable commercial ST-MRAM.The broader/commercial impacts of this project will be the potential to enable the commercial applications of ST-MRAM. The Toggle MRAM is already finding many applications in the stand-alone memory market including networking, industrial controls, data server systems, military, aerospace industry etc. However, in order for MRAM to achieve its full commercial potential, higher density and lower power consumption are needed. High density translates to lower cost. Reducing power consumption is increasingly valued in areas such as portable electronics or even enterprise computing. ST-MRAM technology has the potential to meet these needs by combining non-volatility, high density, high speed, low power, unlimited endurance, and scalability in a single memory.
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SBIR Phase I: Structures for reduced critical current to enable Spin Torque MRAM
  • 批准号:
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  • 负责人:
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