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SHF: Large:Collaborative Research: Architecting the Next Generation Memory Hierarchy - A Holistic Approach

SHF: Large:Collaborative Research: Architecting the Next Generation Memory Hierarchy - A Holistic Approach
SHF:大型:协作研究:构建下一代内存层次结构 - 整体方法
批准号:
1212962
负责人:
Onur Mutlu
金额:
$34.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2012
资助国家:
美国
项目状态:
已结题
起止时间:
2012-08-01 至 2016-07-31

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中文摘要
翻译
内存系统仍然是几乎所有计算系统的主要性能和功率瓶颈。而且,随着主要应用程序、架构和技术趋势的发展,它正变得越来越重要。获取和处理实时数据的嵌入式应用程序,必须分析大型数据库的互联网和云应用程序,以及需要处理大量数据集的超大规模时代HPC应用程序,这些只是需要高内存容量、性能和能效的日益增长的数据密集型应用程序的几个例子。因此,众所周知的内存墙问题已经变得更加难以克服,需要对未来计算平台的内存层次设计进行根本性的重新思考。本提案的目标是考虑到新兴的设备/内存技术,从根本上和全面地重新思考整个内存层次的设计,并利用系统堆栈的不同层的设计权衡——从设备到微体系结构,编译器和运行时系统。该解决方案将涵盖架构创新和优化整个内存路径,包括缓存、片上网络、内存控制器和主存储器。目标是在未来十年内将内存容量提高100倍,同时将性能提高5倍,将能源效率提高10倍。这项提议的研究有可能改变多核时代下一代存储系统的设计,这有望成为整个IT行业的普遍组成部分。这项研究的交叉性质可以在几个领域培养新的研究方向,包括技术/节能设计、计算机体系结构、编译器和系统/应用软件。随着存储系统成为几乎所有预期未来应用领域的支柱,这项研究的更广泛影响可以加速未来应用的设计和部署。该项目将使研究成果转化为工业,加强本科生和研究生的培训,包括代表性不足的学生,并有助于开发新的研究和教学工具。
英文摘要
The memory system continues to be a major performance and powerbottleneck in nearly all computing systems. And, it is becomingincreasingly more so with major application, architecture, andtechnology trends. Embedded applications that acquire andprocess real-time data, Internet and cloud applications that have toanalyze large databases, and the exa-scale era HPC applications thatneed to crunch voluminous data sets are just a few examples ofincreasingly data-intensive applications that require high memorycapacity, performance, and energy efficiency. Thus, the well-known memory wall problem has become even more difficult to surmount andneeds a fundamental rethinking of the memory hierarchy design for futurecomputing platforms.The goal of this proposal is to fundamentally and holisticallyrethink the design of the entire memory hierarchy taking into considerationthe emerging device/memory technologies and to exploit the design trade-offsat different layers of the system stack -- from devices to micro-architecture,compilers and runtime systems. The solution will cover innovations inarchitecting and optimizing the entire memory path consisting of the caches,on-chip networks, memory controller and main memory. The objectiveis to enable 100X improvement in memory capacity over the nextdecade, while providing 5X improvement in performance and10X improvement in energy efficiency. The proposed research has the potential to transform the design ofnext-generation memory systems for the multi-core era, which is expectedto be a ubiquitous part of the entire IT sector.The cross-cutting nature of this research can foster new research directionsin several areas, spanning technology/energy-aware design, computer architecture,compilers, and system/application software. With the memory system formingthe backbone of nearly every envisioned future application domain, thebroader impact of this research can accelerate the design and deploymentof future applications. This project will enable transfer of researchresults to industry, enhance undergraduate and graduate student trainingincluding under-represented students, and contribute to the development of newresearch and teaching tools.
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会议论文
EAGER: Collaborative Research: Heterogeneous Cores, Memory-Hierarchy and Communication Architectures for Future CMPs
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