CSR: Small: Heterogeneous Memory Design: Exploiting Device Diversity for Superior System Performance

随着技术扩展到10nm，基于cmos的存储器件可能不再是选择的技术。相反，新兴技术，如相变存储器，自旋转移扭矩磁存储器和铁磁存储器，更具可扩展性，是后硅时代可行的替代品。这些存储设备在物理操作和性能上各不相同，没有赢家通吃！这个项目提倡使用异构存储系统，它结合了不同存储技术的优点，以提供优越的系统性能。第一步涉及开发一个分层内存模型，该模型捕获了不同内存技术的通用行为和独特的设备物理。该模型还能够预测未来技术节点的性能和可靠性。下一步是将该模型集成到电路和架构级模拟器中，以探索异构存储系统。智力上的优点在于从设备物理到建模再到架构探索的协调努力。将在存储器件建模方面取得研究进展，包括预测建模、错误分析和建模、提高可靠性的错误管理和异构存储系统设计。预计本项目的研究成果将对集成电路设计产业和国民经济产生重大影响。拟议的努力将为多学科研究和培训营造一个独特的环境。它将通过训练本科生和研究生进行跨学科研究，并为探索性内存设计提供一个开放的模拟环境，帮助弥合存储设备物理学和计算机架构师之间的差距。

As technology scales to 10nm, CMOS-based memory devices may no longer be the technology of choice. Instead, emerging technologies, such as phase-change memory, spin-transfer torque magnetic memory, and ferromagnetic memory, are more scalable and are viable alternatives for the post-silicon era. These memory devices are diverse in their physical operation and performance and there is no winner-takes-all! This project advocates the use of heterogeneous memory systems which combine the advantages of the different memory technologies to deliver superior system performance. The first step involves development of a hierarchical memory model which captures both the generic behavior and unique device physics of the different memory technologies. This model is also capable of predicting the performance and reliability of future technology nodes. The next step is on integration of this model into circuit and architecture-level simulators for exploration of heterogeneous memory systems. The intellectual merit lies in the coordinated effort spanning from device physics to modeling to architecture exploration. Research advances will be made in memory device modeling including predictive modeling, error analysis and modeling, error management for improved reliability and heterogeneous memory system design. The research outcome from this project is expected to have a significant impact on integrated circuit design industry and national economy. The proposed effort will foster a unique environment for multi-disciplinary research and training. It will help bridge the gap between memory device physics and computer architects by training undergraduate and graduate students in cross-disciplinary research and also by providing an open simulation environment for exploratory memory design.