SHF: Small: Algorithm/Architecture Co-Design of Low Power and High Performance Linear Algebra Compute Fabrics
SHF: Small: Algorithm/Architecture Co-Design of Low Power and High Performance Linear Algebra Compute Fabrics
批准号:
1218483
负责人:
Andreas Gerstlauer
金额:
$49.99万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2012
资助国家:
美国
项目状态:
已结题
起止时间:
2012-06-01 至 2017-05-31
中文摘要
直到最近,计算机处理器的速度还可以通过将更多的晶体管组装到更小的区域中并提高频率来提高。由于功率限制,这一趋势现在是不可持续的,即使在一块芯片上安装数百或数千个传统内核,未来也只会有适度的收益。因此,如何在提高性能的同时降低功耗是人们关注的核心问题之一。众所周知,专门化(为特定任务设计处理器的部件)和异构性(为不同的任务指定处理器的不同部件)可以导致这两个方面的数量级改进。然而,问题是这样的效率能否保持,同时提供足够的灵活性来实现广泛的操作类别。利用独特的领域专业知识,该项目下的研究针对矩阵计算领域的这个问题,矩阵计算领域是许多计算进步的核心,无论是在科学的高性能计算中,还是在嵌入式、移动或网络物理领域中。观察到通过基础的专业化可以获得最大的好处,该项目的目的是共同设计算法和架构,以硬件和软件的优化组合直接实现基本线性代数方法。通过设计专门的线性代数处理器(LAP),可以实现比传统或建议的计算机体系结构提高一到两个数量级的效率。该项目将通过分析、模拟和原型技术的结合来回答的问题包括:(1)如何最好地设计这样的LAPS,以便能够有效地执行全套线性代数例程;以及(2)LAPS如何被扩展,联网到集群中,并与在一个或多个主机处理器上运行的应用软件集成。该项目的广泛目标是开发新的、集成线性代数计算结构,这些结构在从基本硬件基础到标准线性代数软件包的应用程序编程支持的所有层上进行共同优化和共同设计。该项目预计将导致计算科学和发现能力的飞跃,从而使工业、消费者、国家实验室、教育和学术界的科学家能够实现新的突破。
英文摘要
Until recently, the speed of a computer processors could be increasedby packing more transistors into a smaller area and increasing thefrequency. This trend is now unsustainable because of powerconstraints, with only moderate gains going forward even when puttinghundreds or thousands of traditional cores onto a chip. Thus, how toreduce power consumption while increasing performance is one of thecore concerns. It is well-accepted that specialization (designingparts of the processor for a specific task) and heterogeneity(designating different parts of the processor for different tasks) canlead to orders of magnitude improvements in both aspects. However,the question is whether such efficiency can be maintained whileproviding enough flexibility to implement a broad class of operations.Leveraging unique domain expertise, research under this projectaddresses this question for the domain of matrix computations, whichare at the core of many computational advances, both in scientifichigh-performance computing as well as in the embedded, mobile orcyber-physical domains.Observing that the largest benefits can be obtained throughspecialization at the foundations, this project is aimed atco-designing algorithms and architectures to directly realize basiclinear algebra methods in an optimized combination of hardware andsoftware. By designing a specialized Linear Algebra Processor (LAP),it is possible to achieve one to two orders of magnitude improvedefficiencies compared to traditional or proposed computerarchitectures. The questions that the project will answer, through acombination of analysis, simulation, and prototyping, include: (1) Howto best design such LAPs that can efficiently execute the full set oflinear algebra routines; and (2) How LAPs can be scaled, networkedinto clusters and integrated with application software running on oneor more host processors. The broad goal of this project is to developnovel, integrated linear algebra compute fabrics that are co-optimizedand co-designed across all layers ranging from the basic hardwarefoundations all the way to the application programming support throughstandard linear algebra software packages. This project is expectedto result in a leap in computational science and discoverycapabilities, thus enabling novel breakthroughs in industry, for theconsumer, at the national labs, in education and by scientists inacademia.
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Student Travel Grant for Embedded Systems Week (ESWEEK) 2019
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批准号:1929543
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项目类别:Standard Grant
-
资助金额:$1.5万
-
财政年份:2019
-
负责人:Andreas Gerstlauer
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批准号:1421642
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项目类别:Standard Grant
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资助金额:$48.83万
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财政年份:2014
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负责人:Andreas Gerstlauer
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批准号:1018075
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项目类别:Continuing Grant
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财政年份:2010
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负责人:Andreas Gerstlauer
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依托单位:
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