SHF: Medium: Programmability, Portability, Performance and Energy Efficiency for Heterogeneous Systems

为了最大限度地提高能效，未来的移动设备将包括各种硬件，例如大型和小型通用处理器内核、矢量单元、图形处理单元(GPU)、数字信号处理器(DSP)以及半定制和定制加速器内核。这种“异质性”可能会推动移动计算领域的新一轮创新浪潮，但受到几个根本性挑战的阻碍。一些最大的挑战是，这种不同的系统对编程具有极大的挑战性；使用不同硬件的软件应用程序很难在不同的移动设备上移植；这些设备中的存储系统缺乏灵活性和低效；这个项目背后的一个关键洞察力是，精心设计的硬件抽象层-“虚拟指令集”--抽象了不同计算单元之间的并行性和存储器子系统的差异，可以提供一个框架，在其中可以非常有效地解决所有上述相互关联的问题。该项目正在开发一种名为虚拟指令集计算的框架，该框架使用这种方法来解决上述挑战。该框架只使用两到三个并行模型和一个统一的、丰富的通信模型来捕获各种不同的硬件。硬件内存体系结构支持专门的内存子系统和为这些子系统定制的新颖内存优化，而编译器对应用程序使用的内存进行分区以利用这些分区；这些专门化技术加在一起将在内存效率方面提供数量级的改进。机器学习关键领域的半定制加速器正在推动新的编程和存储系统设计技术，以在此类系统中集成和使用半定制加速器。整个研究建立在广泛使用的LLVM虚拟指令集和编译器基础设施(以前由该研究团队成员开发)的基础上，这些基础设施已经在工业中广泛使用，增强了这项工作的技术转移的潜力。如果这个项目成功，它可以实现更强大的手机、平板电脑和其他此类设备，以及更先进的软件应用程序，可以充分利用这些设备的丰富功能。

To maximize energy efficiency, future mobile devices will include a diverse range of hardware, such as large and small general-purpose processor cores, vector units, graphics processing units (GPUs), digital signal processors (DSPs), and semi-custom and custom accelerator cores. This "heterogeneity" could power a new wave of innovation in mobile computing but is blocked by several fundamental challenges. Some of the biggest challenges are that such heterogeneous systems are highly challenging to program; that it is very difficult for software applications that use the diverse hardware to be portable across different mobile devices; that the memory systems in these devices are inflexible and inefficient; and that the semi-custom and custom accelerators are poorly integrated with the rest of the memory system and the programming environments.A key insight behind this project is that a carefully designed hardware abstraction layer --- a "Virtual Instruction Set" --- that abstracts away the differences in parallelism and memory subsystems across the different compute units can provide a framework in which all of the above interrelated problems can be solved extremely effectively. The project is developing a framework called Virtual Instruction Set Computing that uses this approach to address the above challenges. The framework uses just two or three models of parallelism and a uniform, rich model of communication to capture the full spectrum of heterogeneous hardware. The hardware memory architecture supports specialized memory sub-systems and novel memory optimizations customized for those sub-systems, while compilers partition the memory used by applications to make use of these partitions; together, these specialization techniques will provide an order of magnitude improvement in memory efficiency. Semi-custom accelerators for the key domain of Machine Learning are driving new programming and memory system design techniques to integrate and use semi-custom accelerators in such systems. The overall research builds on the widely used LLVM virtual instruction set and compiler infrastructure (previously developed by members of this research team), which are already widely used in industry, enhancing the potential for technology transfer from this work. If this project is successful, it can enable far more powerful mobile phones, tablets, and other such devices, and far more advanced software applications that can make full use of the rich capabilities of these devices.