Collaborative Research: SHF: Medium: Differentiable Hardware Synthesis
Collaborative Research: SHF: Medium: Differentiable Hardware Synthesis
批准号:
2403134
负责人:
Cunxi Yu
金额:
$45.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2024
资助国家:
美国
项目状态:
未结题
起止时间:
2024-10-01 至 2028-09-30
中文摘要
在快速发展的数字世界中,创造高性能和高效的计算机硬件是至关重要的。电子设计自动化(EDA)是一个自动化和优化硬件设计的过程,随着复杂性的不断增加,它变得更加关键和具有挑战性。这个项目引入了一种新的EDA方法,通过混合形式方法、机器学习和并行计算来解决电路优化问题。这项提议的研究旨在改变计算机芯片的制造方式,使设计过程更快、更便宜、适应性更强。研究成果和工具将公开提供,以促进多学科社区的技术转让和产学研互动。研究成果和工具将公开提供,以支持技术转让和多学科社区中工业界和学术界之间的相互作用。这一努力还将包括积极参与教育和劳动力发展倡议,包括高中生和代表性不足群体的学生。为了解决现有综合解决方案的固有局限性,例如不利的速度-质量权衡和利用领域知识的不灵活性,本研究引入了一种将形式技术与基于学习的优化相结合的新策略。具体来说,该研究采用了一种完全不同的方法,创建了非常适合异构计算的可微分硬件合成技术。关键策略包括将形式技术与基于学习的优化相结合,这有助于有效的全局优化,无论是否需要训练数据,同时利用图形处理单元(gpu)等并行计算设备的计算能力。这种新方法与传统方法的区别在于,它能够通过并行计算资源扩展全局优化,并且有可能结合其他机器学习模型,通过反向传播实现数据驱动的优化。开发的算法和软件将开放源代码,并通过全面的教程和教育材料向公众开放。该奖项反映了美国国家科学基金会的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
In the rapidly evolving digital world, creating high-performance and efficient computer hardware is crucial. Electronic design automation (EDA), a process that automates and optimizes the design of hardware, becomes even more critical and challenging with the ever-increasing complexity increases. This project introduces a novel approach to EDA, by solving circuit optimization problems with a blend of formal methods, machine learning, and parallel computing. This proposed research aims to transform the way computer chips are made, making the design process faster, less expensive, and more adaptable. The research findings and tools will be made publicly available to facilitate technology transfers and industry-academia interactions in a multidisciplinary community. The research findings and tools will be made publicly available to support technology transfers and interactions between industry and academia in a multidisciplinary community. This effort will also include active participation in educational and workforce development initiatives, involving high-school students and students from underrepresented groups.In addressing the inherent limitations of existing synthesis solutions, such as unfavorable speed-quality trade-offs and inflexibility in leveraging domain knowledge, the presented research introduces a novel strategy that combines formal techniques with learning-based optimization. Specifically, the research takes a radically different approach by creating differentiable hardware synthesis techniques that are well-suited for heterogeneous computing. The key strategy involves the combination of formal techniques with learning-based optimization, which facilitates efficient global optimization, with or without the need for training data, while taking advantage of the computational power of parallel computing devices like graphics processing units (GPUs). This new approach distinguishes itself from conventional methods by its ability to scale global optimization through parallel computing resources, as well as its potential to combine other machine learning models to enable data-driven optimization via back-propagation. The developed algorithms and software will be made open-source and publicly accessible with comprehensive tutorials and educational materials.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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