SBIR Phase I: Ultra Low Defect Gallium Nitride Mediated by Metal Alloys

该小型企业创新研究（SBIR）第一阶段项目的更广泛影响/商业潜力在于，用于存款晶格匹配材料的沉积技术在晶圆面积上可扩展到200 mm和300 mm晶圆处理，并且已经在当今的CMOS代工厂中发现。 这两个因素，使用大面积沉积工艺和充分利用折旧CMOS工厂，导致整体封装器件成本显着降低。在这种方式下，这些硅上的晶格匹配材料将导致一个新的行业标准的晶圆，从一家美国公司提供全球200毫米和300毫米晶圆发光二极管和功率半导体行业。这个小企业创新研究（SBIR）第一阶段项目的重点是将大面积硅晶圆表面转化为块状质量的氮化镓（GaN）。 该晶圆技术将被发光二极管和功率半导体制造商用于生产最亮、最高效的GaN基器件。 该第一阶段项目下的新技术基于沉积一种正在申请专利的纯金属合金，该合金既可以将晶格常数从Si分级到GaN，又可以平衡残余热失配，以保持平坦的晶片。 通过消除热和晶格失配，促进了低缺陷密度GaN在大面积晶片上的生长，从而导致体GaN质量材料效率。

The broader impacts/commercial potential of this Small Business Innovation Research (SBIR) Phase I project is that the deposition techniques used to deposit the lattice matching materials are scalable in wafer area to 200mm and 300mm wafer processing and are already found in today's CMOS foundries. Both factors, using large area deposition process and leveraging fully depreciated CMOS fabs, lead to significant reduction in overall packaged device cost. In this fashion, these lattice matching materials on Si will result in a new industry standard wafer from a US company supplying globally 200mm and 300mm wafers to light emitting diode and power semiconductor industries.This Small Business Innovation Research (SBIR) Phase I project is focused on converting the surface of large area silicon wafers into a bulk-like quality Gallium Nitride (GaN). The wafer technology will be used by light emitting diode and power semiconductor manufacturers to grow the brightest and most efficient GaN based devices. The novel technology under this Phase I project is based on depositing a patent pending purely metallic alloy that both grades the lattice constant from Si to GaN and counter balances residual thermal mismatch to maintain a flat wafer. By removing both thermal and lattice mismatch, growth of low defect density GaN is promoted on large area wafers leading to bulk GaN quality material efficiencies.