XPS: EXPL: FP: Collaborative Research: Formal methods based algorithmic synthesis of more-than-Moore nano-crossbars for extreme-scale computing

集成电路的晶体管密度大约每两年翻一番，持续了大约40年。集成电路计算能力的指数级增长推动了信息技术革命，它改变了我们社会的方方面面——从个人娱乐设备到高保障的智能网络物理系统。然而，晶体管密度的增长现在正在放缓，迫切需要新的技术突破来维持正在进行的信息技术革命。该项目创建了一种新的基于忆阻器的纳米计算架构，绕过了传统基于晶体管的集成电路的制造密度问题。该项目研究了基于忆阻器的纳米计算的基本原理，并设计了高效的基于忆阻器的纳米交叉电路，可以执行基本的位矢量数学和逻辑计算。该项目追求下一代极端规模计算的变革议程，涉及两个设计原则：(1)使用忆阻器作为分布式异步数字开关和输入数据和中间结果的连续值非易失性纳米存储，以及(2)使用纳米交叉棒中的偷偷路径作为基本计算基元，将分布式忆阻器纳米存储的中间计算结果汇集在一起。该项目开发的基于忆阻器的纳米计算架构将使传统程序能够在低能耗超密度忆阻纳米交叉电路上执行，并将促进特定领域并行执行引擎的设计，将存储和计算结合在同一芯片上，从而消除存储器和微处理器之间的传统障碍。

The transistor density of integrated circuits has been doubling approximately every two years for about four decades. This exponential rise in the computational power of the integrated circuit has driven the information technology revolution that has transformed every aspect of our society - from personal entertainment devices to high-assurance intelligent cyber-physical systems. However, the growth in transistor density is now slowing down, and new technological breakthroughs are urgently needed to sustain the ongoing information technology revolution. This project creates a new memristor-based nano-computing architecture that circumvents the fabrication density problems associated with traditional transistor-based integrated circuits. The project investigates the fundamental principles of memristor-based nano-computing and designs efficient memristor-based nano-crossbar circuits that can execute elementary bit-vector mathematical and logical computations. The project pursues a transformative agenda for next-generation extreme-scale computing involving two design principles: (1) the use of memristors as distributed asynchronous digital switches and continuous-valued non-volatile nano-stores of input data and intermediate results, and (2) the use of sneak-paths in nano-crossbars as fundamental computational primitives that pool together results of intermediate computations from distributed memristor nano-stores.The memristor-based nano-computing architecture developed in the project will enable the execution of legacy programs on low-energy ultra-dense memristive nano-crossbar circuits and will facilitate the design of domain-specific parallel execution engines that combine storage and computation on the same chip - thereby nullifying the traditional barrier between the memory and the microprocessor.