CAREER: Low-Power Transceiver Design Methods for Wireless Medical Monitoring
CAREER: Low-Power Transceiver Design Methods for Wireless Medical Monitoring
批准号:
1451213
负责人:
Marvin Onabajo
金额:
$50.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2015
资助国家:
美国
项目状态:
已结题
起止时间:
2015-02-15 至 2021-09-30
中文摘要
提案编号:1451213摘要标题:无线医疗监测的低功率收发器设计方法需要更低功耗的无线通信芯片,以便为众多电池供电的便携式和可植入生物信号测量设备实现更广泛的无线连接。然而,功耗的降低导致了性能和可靠性的下降,这阻碍了低功耗电路设计方法的采用。在医疗应用、无线传感器网络和具有能量收集功能的芯片中,需要创新的集成电路设计技术来缓解这种权衡。这个项目的主要研究目标是通过结合高效的数字电路来创建可调低功耗模拟电路的性能和可靠性增强的设计方法。一个关键的教育目标是开创一种统一的方法,通过这种方法,学生合作学习将低功耗模拟集成电路设计和数字辅助性能调整方法与主要关注尖端医疗应用相结合。新的课程材料将建立一个长期的研究和教育计划,旨在为各种微型设备创造可靠的无线功能。本科生和高中实习生将直接参与研究任务。该项目团队将与东北大学STEM教育中心合作,与K-12学生和教师组织校园活动,并进行外联访问,以联系当地学校中代表不足的群体。最先进的低功率接收器由于其有限的动态范围而容易受到干扰,当多个无线医疗监测设备彼此紧密共存时,这一点尤其严重。为了克服这一挑战,将设计一种自适应设计方法,通过在接收器路径中进行额外的滤波来增强干扰抑制。这项研究工作将解决低功率集成电路的性能缺陷,以便更广泛的设备可以配备短距离无线连接。它将通过在射频前端引入自适应滤波、低功率模拟电路的数字辅助线性度改进以及用于自我校准的数字频谱分析,为设计具有更好抗干扰性的收发机提供新的知识。将演示新颖的电路级线性化方法,以实现包括工作在亚阈值区域的晶体管的模拟电路的设计,该晶体管具有显著改进的动态范围。这些方法将被利用来实现领先的性能,与当前的收发器相比,功率不到六分之一。这项研究将产生使用高效快速傅里叶变换引擎来评估模拟电路的增益和线性度特性的技术,该引擎计算信号的频谱时,芯片面积比现有方法小得多。这将是新的内置测试和校准策略的基础,这些策略可以抵消先进芯片制造技术不断上升的工艺差异。
英文摘要
Proposal Number: 1451213Abstract Title: Low-Power Transceiver Design Methods for Wireless Medical Monitoring Wireless communication chips with lower power consumption are needed to enable more widespread wireless connectivity for numerous battery-powered portable and implantable biosignal measurement devices. However, reduced power consumptions lead to degraded performance and reliability, which inhibits the adoption of low-power circuit design approaches. Innovative integrated circuit design techniques are required to alleviate this tradeoff in medical applications, wireless sensor networks and chips with energy harvesting features. The primary research objective of this project is to create design methodologies for performance and reliability enhancements of tunable low-power analog circuits through the incorporation of efficient digital circuits. A key educational goal is to pioneer a unified approach through which students collaboratively learn to combine low-power analog integrated circuit design and digitally assisted performance tuning methods with a primary focus on cutting-edge medical applications. New course materials will establish a long-lasting research and education program aimed at creating reliable wireless capabilities for various miniaturized devices. Undergraduates and high school interns will be directly involved in research tasks. The project team will collaborate with Northeastern University's Center for STEM Education to organize on-campus activities with K-12 students and teachers as well as outreach visits to connect with underrepresented groups in local schools. State-of-the-art low-power receivers are prone to interference due to their limited dynamic ranges, which is particularly severe when multiple wireless medical monitoring devices coexist in close proximity to each other. To overcome this challenge, an adaptive design methodology will be devised to enhance interference suppression through extra filtering in the receiver path. This research effort will address the performance deficiencies of low-power integrated circuits such that a broader range of devices can be equipped with short-range wireless connectivity. It will provide new knowledge to design transceivers with better immunity to interference through the introduction of adaptive filtering in RF front-ends, digitally assisted linearity improvements for low-power analog circuits, and digital spectrum analysis for self-calibrations. Novel circuit-level linearization methods will be demonstrated to enable the design of analog circuits that include transistors operating in the subthreshold region with substantially improved dynamic ranges. These methods will be leveraged to achieve leading-edge performance with less than one-sixth of the power compared to current transceivers. The research will produce techniques to evaluate gain and linearity characteristics of analog circuits using an efficient fast Fourier transform engine that calculates the frequency spectrum of signals with significantly less chip area than existing methods. This will be a foundation for new built-in test and calibration strategies that counteract rising process variations of advanced chip manufacturing technologies.
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