GOALI: An Electrochemical Atomic Layer Deposition Process for Scalable Nanomanufacturing of On-chip Copper-based Interconnects

微处理器和存储设备中的先进纳米电子电路利用载流铜互连。在现代设备中，互连的宽度通常接近几十纳米。然而，高性能计算中对高互连封装密度的需求驱动了按照摩尔定律相应缩小的互连宽度。到2020年，互连的宽度有望缩小到10纳米以下。推动这种积极缩小互连尺寸的关键障碍是缺乏具有以下属性的互连制造工艺：(i)需要前所未有的原子水平控制，以操纵纳米级或更低级别的材料；（ii）易于扩大规模并与大面积基板集成，从而产生可靠的低成本制造能力。这项学术与工业联络资助机会（GOALI）计划奖将探索具有上述属性的纳米级互连制造的新方法。这对于维护摩尔定律和确保美国半导体行业在先进纳米电子学领域继续保持技术领先地位至关重要。这项研究不仅将在纳米电子学领域产生广泛的影响，而且还将在许多其他对美国经济和社会至关重要的领域产生广泛的影响，例如先进的能源系统和环境修复。除了在可扩展纳米制造方面取得突破外，这项研究还将为美国工业界高度追捧的下一代科学家和工程师提供体验式工程教育和专业发展。该项目的目标是研究一种新的电化学原子层沉积（e-ALD）工艺，用于铜和铜合金互连的可扩展纳米制造。尽管具有巨大的潜力，但最先进的电化学原子层沉积铜尚未达到商业可行性，主要原因是其产量低，使用有毒金属，如铅，以及无法制造与纳米电子应用相关的特定铜合金。为了克服这些障碍，将研究“一步”无铅电化学原子层沉积工艺。通过对电极电位和电解质化学之间相互作用的基本表征，并通过使用新颖、环保的电解质成分，一步沉积铜和铜合金纳米膜将实现。该项目将消除工业规模实施纳米级铜互连金属化电化学原子层沉积技术的关键技术障碍。一个由学术界和工业界科学家组成的跨学科团队将通过在尖端电化学和先进纳米电子学方面的知识交流，合作开展研究。

Advanced nanoelectronic circuits in microprocessors and memory devices utilize current-carrying copper interconnects. In modern devices, interconnect widths routinely approach a few tens of nanometers. However, the need for high interconnect packing density in high-performance computing drives a commensurate shrinking in the interconnect width in accordance with Moore's law. By the year 2020, interconnect widths are expected to shrink well below ten nanometers. A critical hurdle in driving such aggressive interconnect size reduction is the unavailability of an interconnect fabrication process with the following attributes: (i) Unprecedented atomic-level control needed to manipulate materials at the nanometer scale or below; and (ii) Ease of scale-up and integration with large-area substrates yielding reliable, low-cost manufacturability. This Grant Opportunity for Academic Liaison with Industry (GOALI) Program award will explore a novel approach towards nano-scale interconnect fabrication with the aforementioned attributes. This is critical for safeguarding Moore's law and for ensuring that the US semiconductor industry continues to maintain technological leadership in advanced nanoelectronics. This research will have broad impacts not just in the field of nanoelectronics, but also in many other areas central to the US economy and society, such as advanced energy systems and environmental remediation. In addition to enabling breakthroughs in scalable nanomanufacturing, this research will provide experiential engineering education and professional development to the next generation of scientists and engineers highly sought after by the US industry.The goal of the project is to study a novel electrochemical atomic layer deposition (e-ALD) process for the scalable nanomanufacturing of copper and copper-alloy interconnects. In spite of its enormous potential, state-of-the-art electrochemical atomic layer deposition of copper has not reached commercial viability primarily due to its low throughput, use of toxic metals, such as lead, and its inability to fabricate specific copper-alloys of relevance to nanoelectronic applications. To overcome these barriers, a 'one-step' lead-free electrochemical atomic layer deposition process will be investigated. Through fundamental characterization of the interplay between the electrode potential and the electrolyte chemistry, and through use of novel, environmentally benign electrolyte components, one-step deposition of copper and copper-alloy nano-films will be achieved. The project will eliminate a key technological roadblock in industrial-scale implementation of electrochemical atomic layer deposition technology for the metallization of nano-scale copper interconnects. An inter-disciplinary team of academic and industrial scientists will collaborate on the research through the exchange of knowledge in cutting-edge electrochemistry and advanced nanoelectronics.