SBIR Phase I: Ultra-High Speed In-Memory Searchable Dynamic Random Access Memory

小型企业创新研究(SBIR)第一阶段项目的更广泛影响/商业潜力由一种新颖的数据处理体系结构提供，该体系结构利用高度并行的内存计算来实现某些重复和数据密集型功能。传统的计算机体系结构通过CPU传输所有数据。多个CPU核心和非常高的时钟频率通常用于解决不断增长的数据处理能力需求的问题。从经济和环境的角度来看，这都是不可持续的，因为涉及的电力消耗和计算的有限并行性导致的性能不足。数据中心和云计算早已失去了绿色标签。最初与互联网技术和软件有关。它们的运营商需要找到更经济的方法来处理大量数据。由于存储器体系结构固有的并行性，线性搜索和数据索引可以在存储器本身内经济地执行，并且在性能上有几个数量级的提高。同时，由于消除了数据传输和所涉及的CPU时钟周期，这带来了显著的电力节约。数据中心将能够以发热的服务器和更低的功耗为更多的客户提供服务。这个小型企业创新研究(SBIR)第一阶段项目调查了利用高密度存储芯片固有的重复结构的内存中数据搜索和比较算法的可行性。初步计算表明，通过就地计算和同时消除数据传输，数据吞吐量提高了几个数量级。这满足了行业对所谓的大数据应用程序的低功耗解决方案的巨大需求，这些应用程序预计将通过物联网(IoT)继续呈指数级增长，预计在不久的将来，云存储的传感器数据将超过人类上传的数据。该第一阶段项目将进行详细的架构研究，以及商业上可行和向后兼容的通信协议，以及旨在建立商业可行性和吸引潜在客户和许可合作伙伴的行为模型。对新型数模传感电路的详细模拟将彻底调查关键知识产权，为这项创新的商业实现奠定基础。

The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase I project is provided by a novel data processing architecture, utilizing high-parallel in-memory computing for certain recurring and data intensive functions. Traditional computer architecture funnels all data through the CPU. Multiple CPU cores and very high clock frequencies are often used to address the issue of ever increasing demands on data processing capability. This is not sustainable from both an economical and an environmental standpoint, due to the power consumption involved and the lack of performance resulting from the limited parallelism of computation. Datacenters and cloud computing have long lost the ?green label? originally associated with internet technology and software. Their operators need to find more economical ways to process large amounts of data. Linear searches and data indexing can be performed economically within the memory itself, and at a several orders of magnitude increase in performance, due to the inherent parallelism of memory architecture. At the same time, this comes with significant power savings due to the elimination of data transport and CPU clock cycles involved. Datacenters will be able to serve more clients, with fever servers and less power consumption.This Small Business Innovation Research (SBIR) Phase I project investigates the feasibility of in-memory data search and compare algorithms which utilize the inherent repetitive structures of high density memory chips. Initial calculations suggest several orders of magnitude improvement in data throughput by in-place computation and simultaneous elimination of data transport. This addresses the industry's significant need for lower power solutions for so called "Big Data" applications, which are expected to continue their exponential rise through the Internet of Things (IoT), where cloud-stored sensor data are expected to eclipse data uploaded by humans in the near future. This Phase I project will perform a detailed architecture study along with a commercially viable and backward compatible communication protocol as well as behavioral models aimed at establishing the commercial viability and at attracting potential clients and licensing partners. Detailed simulations of the novel digital to analog sensing circuitry will thoroughly investigate the key intellectual property, laying the groundwork for the commercial realization of this innovation.