Collaborative Research: Development of Atomically Thin Tunnel Barriers for High-Performance Tunnel Junctions

非技术性：隧道结是未来电子产品的一项使能技术。它们是通过在金属或半导体电极之间插入薄绝缘层（称为隧道势垒）而形成的。基于隧道结的器件具有增强的量子相干输运、速度快、尺寸小和能量效率高等优点。隧道结例如用于传感器、闪存和量子或神经计算机中。隧道结的性能关键取决于隧道势垒的质量和厚度。通过势垒的电荷传输，称为量子隧穿，随着层厚度和缺陷浓度的降低而呈指数增加。尽管经过数十年的努力，目前的隧道结技术仅限于至少一纳米厚且具有高缺陷密度的势垒。制造原子级薄（十分之一纳米）、无缺陷的隧道势垒将使下一代隧道结器件成为可能。该项目将通过使用原子层沉积创建原子级薄的高质量隧道势垒来推进隧道结技术。将研究两种重要类型的隧道结。超导约瑟夫森结用作量子计算机的量子比特（qubit）。磁性隧道结是非易失性、快速磁性随机存取存储器和神经形态计算机的核心。通过该项目开发的科学知识将广泛影响未来微电子学的发展。材料和界面的原子尺度控制适用于传感、催化和能源生产。该项目强调前沿教育和前沿研究。这将吸引学生，特别是那些来自代表性不足的群体，追求STEM的职业生涯。技术：该项目侧重于通过原子层沉积（ALD）开发用于隧道结器件的原子级薄隧道势垒。目标是了解和控制用于高性能器件的原子级隧道结材料的物理和化学性质，以实现无缺陷，原子级薄的隧道势垒。尽管约瑟夫森结和磁性隧道结与0.1-1.0 nm厚的Al 2 O3隧道势垒令人兴奋的初步结果，这些隧道结的合成和物理性能的许多基本问题仍然存在。提出了两个主题来回答这些问题。主题1将着重于约瑟夫森结和磁性隧道结的生长，使用定制设计的系统，用于隧道结沉积的原位超高真空原子层沉积-物理气相沉积（ALD-PVD）。该系统集成了具有扫描探针显微镜和尖端增强拉曼光谱（SPM-TERS）功能的表征系统。SPM TERS系统将用于了解ALD隧道势垒和金属-绝缘体（M/I）界面的生长机制，并研究生长参数（如ALD生长温度、源脉冲持续时间和序列）的作用。实验工作将以模拟为指导。专题2将利用超高真空SPM-TERS和多尺度表征技术对隧道势垒和电极/隧道势垒界面进行原位研究，以了解绝缘势垒和电极/隧道势垒界面的微观特性，特别是缺陷对超导量子比特、约瑟夫森结和磁性隧道结性能的影响。该奖项旨在展示基于ALD隧道势垒隧道结的下一代高性能电子产品的创新技术方法。该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Non-technical:Tunnel junctions are an enabling technology for future electronics. They are formed by inserting a thin insulating layer, known as a tunnel barrier, between metal or semiconductor electrodes. Devices based on tunnel junctions have the advantages of enhanced quantum coherent transport, fast speed, small size and energy efficiency. Tunnel junctions are used, for example, in sensors, flash memory and in quantum or neural computers. The performance of a tunnel junction depends critically on the quality and thickness of the tunnel barrier. Charge transport through a barrier, known as quantum tunneling, increases exponentially with decreasing layer thickness and defect concentration. Despite decades of effort, current tunnel junction technology is limited to barriers that are at least one nanometer thick and have a high defect density. Creating atomically thin (one tenth of a nanometer), defect-free tunnel barriers will enable the next-generation of tunnel junction devices. This project will advance tunnel junction technology by creating atomically thin, high-quality tunnel barriers using atomic layer deposition. Two important types of tunnel junctions will be studied. Superconducting Josephson junctions serve as quantum bits (qubits) for quantum computers. Magnetic tunnel junctions are at the heart of nonvolatile, fast magnetic random access memory and neuromorphic computers. The scientific knowledge developed through this project will broadly impact the development of future microelectronics. Atomic scale control of materials and interfaces applies to sensing, catalysis, and energy production. The project emphasizes forefront education and the cutting-edge research. This will attract students, especially those from underrepresented groups, to pursue careers in STEM.Technical:This project focuses on the development of atomically thin tunnel barriers by atomic layer deposition (ALD) for use in tunnel junction devices. The goal is to understand and control the physical and chemical properties of materials used in tunnel junctions at atomic scales for high performance devices in order to achieve defect-free, atomically thin tunnel barriers. Despite exciting preliminary results on Josephson junctions and magnetic tunnel junctions with 0.1-1.0 nm thick Al2O3 tunnel barriers, many fundamental questions remain in synthesis and physical properties of these tunnel junctions. Two topics are proposed to answer these questions. Topic 1 will focus on growth of Josephson junctions and magnetic tunnel junctions using a custom-designed system for in situ ultra-high-vacuum atomic layer deposition-physical vapor deposition (ALD-PVD) for tunnel junction deposition. This system is integrated with a characterization system with scanning probe microscopy and tip-enhanced Raman spectroscopy (SPM-TERS) capabilities. The SPM-TERS system will be used to understand the growth mechanism of the ALD tunnel barriers and the metal-insulator (M/I) interface and the role of growth parameters, such as ALD growth temperature, source pulse durations and sequence will be investigated. Experimental work will be guided by simulation. Topic 2 will carry out in situ study of the tunnel barriers and the electrode/tunnel barrier interface using UHV SPM-TERS and multi-scale characterization at device and circuit levels to understand the microscopic properties of insulating barrier and electrode/tunnel barrier interface, especially the effect of defects, on the performance of superconducting qubits, Josephson junctions, and magnetic tunnel junctions. The goal is to demonstrate an innovative technological approach towards next-generation high-performance electronics based on tunnel junctions with ALD tunnel barriers.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.