SPX: Collaborative Research: Global Address Programming with Accelerators

今天的大规模计算是由并行计算主导的，在并行计算中，一个大任务被分成许多小任务，这些小任务同时运行。传统上，这些任务中的每一个都独立运行到一个共同的停止点，然后它们停止、交换信息并继续。这个全局停止并通信的步骤非常昂贵。这个项目采用了一种不同的方法，其中单个任务直接与其他任务异步通信，而不必等待全局停止点。这种方法可能会在大规模计算任务上产生更好的性能，特别是在正在成为主流的大型机器上，即具有许多cpu和多核处理器的异构机器。该项目将提供一组高性能、开源的数据结构和算法实现，以支持不规则的通信模式，特别是那些出现在生物学、图分析和机器学习的稀疏线性代数中的模式。这些不仅对最终用户直接有用，而且还演示了如何为配备加速器的分布式内存机器设计和设计原语。该项目还需要应用程序开发人员（包括我们组内的和外部的）来使结果广泛有用。该项目将为基于加速器的HPC系统开发一个编程环境，该环境将加速器集成到一个分区全局地址空间（PGAS）模型中，该模型将允许gpu之间以一种非常适合应用程序和底层硬件的方式进行直接通信。具体来说，GPU编程将与upc++ PGAS编程模型（“gpupc++”）集成。因此，该项目将推进算法、编程模型和对异构大型计算机的低级支持方面的技术水平。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Large-scale computing today is dominated by parallel computing, where a large task is divided into many smaller tasks and those smaller tasks run at the same time. Traditionally each of those tasks run independently up to a common stopping point, then they halt, exchange information, and continue. This global stop-and-communicate step is quite expensive. This project instead pursues a different approach, where individual tasks directly communicate with other tasks asynchronously, without having to wait for a global stopping point. This approach is likely to yield better performance on large-scale computing tasks, specifically on what is becoming the dominant large-scale machine, a heterogeneous machine with many CPUs and othermany-core processors. The project will deliver a set of high-performance, open-source data structures and algorithm implementations to support irregular patterns of communication, notably those that arise in biology, graph analytics, and sparse linear algebra for machine learning. These will not only be directly useful for end users but also demonstrate how to design and engineer primitives for accelerator-equipped distributed-memory machines. The project also engages application developers (both in our groups and externally) to make the outcomes broadly useful.The project will develop a programming environment for accelerator-based HPC systems that integrates accelerators into a Partitioned Global Address Space (PGAS) model, which will allow direct communication between GPUs in a manner that is well suited to both applications and the underlying hardware. Specifically, GPU programming will be integrated with the UPC++ PGAS programming model ("GPUPC++"). The project will thus advance the state of the art in algorithms, programming models, and low-level support for the heterogeneous large-scale computers.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.