CAREER: Unifying Heterogeneity of Extreme-Scale Cyberinfrastructures for Higher Productivity and Performance Portability

该项目的目标是提高极端规模的异类可重构体系结构的应用程序开发的性能、可移植性和生产力(易用性)。这一目标是在美国国家科学基金会的十大理念范围内实现的，这十大理念分别是《驾驭数据革命》和最近的一份国家报告，即《2018极端异质》。该项目将使量子模拟、实验高能物理(HEP)和化石能源(FE)等领域的科学家能够专注于其应用的内在特征，例如并行性，而不是被底层硬件的技术细节所拖累。该项目还显著延长了领域科学家遗留代码的寿命。该项目将PI的研究和教学活动结合在一起。该项目的成果将培养出能够为解决大规模网络基础设施中的问题做出贡献的本科生和研究生。该项目旨在通过堪萨斯大学(KU)的多样性、公平和包容性办公室，让妇女和少数群体接受培训，并参与我们小组的研究合作。该项目将提高后艾级(极端规模)异质架构的生产率，推进PI的长期研究目标。这些项目目标与：(1)美国国家科学基金会高级数字基础设施办公室(OAC)的使命和整个国家科学基金会在推动科学进步、促进国家繁荣和福利方面的使命，以及(2)堪萨斯州建设科学和技术环境(B.E.S.T.)的关键战略。《创新报告》。此外，该项目有助于改善堪萨斯州的网络基础设施，重点是建设一支将通过STEM教育改善州经济的劳动力。该项目解决了极大规模高性能可重构计算(HPRC)系统高效和广泛部署的三个障碍：(1)处理资源以不同方式和比例整合的处理异构性不平衡；(2)缺乏分层并行编程模型和/或现有模型的不足；(3)缺乏能够描述HPRC的瞬时和瞬时行为而不是仅描述平均行为的准确的形式化模型。这些挑战，特别是前两个挑战，阻碍了广泛的HPC用户，更具体地说，是量子模拟、实验高能物理(HEP)和化石能源(FE)等领域的科学家广泛采用HPRC。在该项目中提出了三个研究活动：(1)开发可移植的节点级抽象层和运行时库，其将管理并透明地向最终用户提供独立于其类型(虚拟硬件)的硬件资源的统一视图，同时利用FPGA的固有特征，(2)使用多层C-to-Hardware编译创建从分区的全局地址空间(PGAS)模型派生的新的并行域专用语言(DSL)，该多层C-to-Hardware编译支持系统范围的多级粒度和并行性层次，同时还提供应用可移植性，(3)基于随机马尔可夫链和排队网络的设计空间探索形式化模型和离散事件仿真工具的建立与实现。建议的概念和技术将在三个不同的异类大规模HPC系统上实施和评估，以证明它们的可移植性：(1)采用Xilinx FPGA加速器的试验性多节点HPC集群，(2)英特尔硬件加速器研究计划(HARP)系统，以及(3)来自DirectStream的最先进的无操作系统HPRC系统。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，认为值得支持。

The goal of this project is to improve the performance portability and productivity (ease-of-use) of application development for extreme-scale heterogeneous reconfigurable architectures. This goal is in the scope of NSF's 10 Big Ideas, i.e., "Harnessing the Data Revolution", and a recent national report, i.e., "Extreme Heterogeneity 2018". The project will enable scientists in domains such as quantum simulation, experimental High-Energy Physics (HEP), and Fossil Energy (FE) to focus on the inherent characteristics, e.g., parallelism, of their applications rather than be burdened by the technological details of the underlying hardware. The project also significantly increases the longevity of domain scientists' legacy code. This project integrates the PI's research and teaching activities. The outcome from the project will produce undergraduate and graduate students who can contribute to solving problems in large-scale cyberinfrastructure. The project aims to include women and minority groups, through The Office of Diversity, Equity and Inclusion at the University of Kansas (KU), to receive training and engage in research collaboration with our group. This project will enable higher productivity in post-exascale (extreme-scale) heterogeneous architectures, advancing the PI's long-term research goals. These project goals align with: (1) the mission of the Office of Advanced Cyberinfrastructure (OAC) of NSF and the mission of NSF at large in promoting the progress of science and advancing the national prosperity and welfare, and (2) key strategies in the Kansas Building an Environment for Science and Technology (B.E.S.T.) for Innovation report. In addition, this project contributes to improving Kansas cyberinfrastructure, with a focus on building a workforce that will improve the state economy through STEM education.The project tackles three barriers to the efficient and wide spread deployment of extreme-scale high-performance reconfigurable computing (HPRC) systems: (1) the imbalance in processing heterogeneity where processing resources are integrated in different ways and proportions, (2) lack of hierarchical parallel programming models and/or insufficiency of existing models, and (3) lack of accurate formal models that are capable of describing the instantaneous and transient behaviors of HPRCs rather than only describing average behaviors. These challenges, especially the first two, have hindered wide adoption of HPRC by a broad range of HPC users and more specifically scientists in domains such as quantum simulation, experimental High-Energy Physics (HEP), and Fossil Energy (FE). Three research activities are proposed in this project: (1) development of a portable node-level abstraction layer and run-time libraries that will manage and transparently provide to the end-user a unified view of the hardware resources independent of their type (virtualized hardware), while exploiting inherent features of FPGAs, (2) creation of a new parallel domain-specific language (DSL) derived from Partitioned Global Address Space (PGAS) models using a multi-layered C-to-hardware compilation that supports a system-wide multi-level hierarchy of granularity and parallelism while also providing application portability, and (3) formulation and implementation of formal models and discrete-event simulation tools for design space exploration based on stochastic Markov chains and queueing networks. The proposed concepts and techniques will be implemented and evaluated to demonstrate their portability on three distinct heterogeneous large-scale HPC systems: (1) an experimental multi-node HPC cluster populated with Xilinx FPGA accelerators, (2) an Intel Hardware Accelerator Research Program (HARP) system, and (3) a DS8 state-of-the-art OS-less HPRC system from DirectStream.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.