ERI: Composing An Efficient and Adaptive Framework for Real-Time Processing on Next-Gen Edge-Computing Platforms: Models, Architectures, Methodologies, and Prototypes

该奖项的全部或部分资金来自《2021年美国救援计划法案》(公法117-2)。在物联网(IoT)时代，仅靠云基础设施不足以处理和分析分布在智能电网、智能家居和自动驾驶汽车等网络中的各种传感器/设备产生的海量数据。传统的云基础设施在传输、处理和分析这些海量数据时面临着严峻的挑战，包括：带宽不足、高延迟、实时响应不理想、高功耗和隐私保护问题。边缘计算正在作为一种补充解决方案出现，以解决上述云基础设施问题。然而，边缘计算仍处于初级阶段。此外，在网络边缘运行的应用程序正变得越来越复杂，需要更多的处理能力。用于EDGE应用和所利用的传统计算平台的现有算法/技术将不足以处理和分析这些不断增长的数据并高效和有效地处理相关联的计算复杂性。因此，需要创新的解决方案来推动边缘计算从萌芽阶段开始，以便在本质上是异构性的下一代边缘计算平台上支持计算/数据密集型应用。为了促进这一努力，本提案的主要研究目标是创建一个高效和高度适应性的框架(包括模型、体系结构、方法和原型)，以支持和加速下一代边缘计算平台上计算和数据密集型应用程序(包括数据分析/挖掘)的实时处理。我们独特的框架将大大降低相应网络和云基础设施的通信开销和响应延迟，并将增强系统的性能和可扩展性。由于自适应特性，我们的解决方案可以配置并用于广泛的边缘应用，而不限于特定的应用。此外，作为这个研究项目的一个组成部分，我们将为博士和硕士学生开发一个嵌入式和数字系统领域的研究生课程，因为由于附近的高科技公司，科罗拉多州斯普林斯对这些领域的研究和教学有很大的需求。这个研究生项目将帮助我们吸引和吸引更多的研究生从事嵌入式/数字系统的研究，并将加强我们的研究质量和产出，此外还将培养高素质的人才，以满足这些领域日益增长的需求。我们的主要目标和相关挑战将通过以下具体研究目标来解决和实现：(1)进行理论和统计分析，以深入了解边缘计算算法；引入适用于边缘应用/算法的实时处理的新颖分析模型；(2)引入新的、定制的和可重构的体系结构、技术和方法，用于实时原位处理边缘应用；创建独特的技术来执行设计空间探索，并动态映射/重新映射相应的电路和任务，以提高速度、面积/功率效率；创建基于现场可编程门阵列(现场可编程门阵列)的原型。在本研究工作中，我们将介绍独特的分析模型，这些模型特别适合于应用程序的实时原位处理。我们将创建通用、参数化和可扩展的创新模型、体系结构和方法；因此，在不改变内部结构的情况下，我们的设计可以用于任何边缘计算平台，并可以用于处理不同的数据集。我们的架构和技术将通过执行设计空间探索和独特的方法来创建。我们将引入新的技术，在全球范围内动态重新配置整个平台，并在本地重新配置一些系统，以提供必要的自适应、自我修复和自我纠正特性，从而在降低总体成本的同时延长系统的使用寿命。由于我们的设计具有可重新配置的特性，我们的解决方案可以针对其他任务进行配置，而不限于特定的任务。我们的自适应框架既可以用于边缘节点，也可以用于边缘设备。我们将创建基于现场可编程门阵列的原型(在单芯片和多芯片平台上)，以评估我们建议的架构、技术和方法。该项目将导致几个主要的研究贡献：(1)创建新的分析模型并引入独特的方法来表征软件算法；(2)引入分解技术，以及关于如何修改软件算法以与硬件/平台兼容的指南；(3)引入独特的设计空间探索(DSE)方法，考虑平台/应用程序的约束/要求来执行DSE，并创建通用的、参数化的和可扩展的体系结构/加速器/技术；(4)引入独特的方法并创建中央控制器以动态映射/重映射基本任务的电路；(5)为计算/数据密集型应用引入定制和可重新配置的架构和技术，以进一步提高速度、面积和功率，并最终创建基于FPGA的原型。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

This award is funded in whole or in part under the American Rescue Plan Act of 2021 (Public Law 117-2)In the Internet of Things (IoT) era, cloud infrastructure alone will not suffice to process and analyze the enormous amount of data being generated from various sensors/devices distributed throughout networks such as smart girds, smart homes, and autonomous vehicles. Traditional cloud infrastructure faces serious challenges when transmitting, processing, and analyzing this enormous amount of data, including: insufficient bandwidth, high latency, unsatisfactory real-time response, high power consumption, and privacy protection issues. Edge computing is emerging as a complementary solution to address the aforementioned issues of cloud infrastructure. However, edge computing is still in its infancy. Also, applications running at the edges of the networks are becoming more complex requiring more processing power. Existing algorithms/techniques for edge applications and conventional computing platforms utilized will not suffice to process and analyze this ever-increasing data and to handle the associated computational complexity, efficiently and effectively. Hence, innovative solutions are needed to propel the edge computing from its infancy, in order to support compute/data-intensive applications on next-gen edge-computing platforms that are heterogenous in nature. To facilitate this endeavor, the main research objective of this proposal is to create an efficient and highly adaptive framework (comprising models, architectures, methodologies, and prototypes) to support and accelerate real-time processing of compute and data intensive applications (including data analytics/mining) on next-gen edge-computing platforms. Our unique framework will dramatically reduce the communication overhead and response latency of the corresponding networks and cloud infrastructure, and will enhance the performance and scalability of the systems. Due to adaptive traits, our solutions can be configured and utilized for broad range of edge applications, and will not be limited to specific application. Also, as an integral part of this research project, we will develop a graduate program in embedded and digital systems domains for both the doctoral and master’s students, since there is a significant demand for research and teaching in these domains in Colorado Springs, due to the high-tech companies in the vicinity. This graduate program will help us to attract and engage many graduate students in embedded/digital systems research, and will strengthen our research quality and output, in addition to producing highly qualified personnel to satisfy the growing demand of industry and academia in these domains.Our main objective and the associated challenges will be addressed and achieved through the following specific research objectives: (1) Perform theoretical and statistical analysis to gain insight into edge computing algorithms; introduce novel analytical models suitable for real-time processing of edge applications/algorithms; (2) Introduce novel, customized, and reconfigurable architectures, techniques, and methodologies for real-time in situ processing of edge applications; create unique techniques to perform design space exploration and to dynamically map/remap the corresponding circuitry and tasks, to enhance speed, area/power-efficiency; create field programmable gate array (FPGA) based prototyping.In this research work, we will introduce unique analytical models that are well suited especially for real-time in situ processing of applications. We will create innovative models, architectures, and methodologies that are generic, parameterized, and scalable; thus, without changing the internal structures, our designs can be used for any edge-computing platform, and can be used to process varying datasets. Our architectures and techniques will be created by performing design space exploration coupled with unique methodologies. We will introduce novel techniques to dynamically reconfigure the whole platform globally and some systems locally, to provide the necessary self-adaptive, self-healing, and self-correcting traits, which in turn will prolong the useful life of the systems while reducing the overall cost. Due to the reconfigurable nature of our designs, our solutions can be configured for other tasks and will not be limited to a specific task. Our adaptive framework can be utilized both on the edge-nodes and on edge-devices. FPGA-based prototyping (on single-chip and multi-chip platforms) will be created to evaluate our proposed architectures, techniques, and methodologies. This project will lead to several major research contributions: (1) create novel analytical models and introduce unique methodologies to characterize software algorithms; (2) introduce decomposition techniques, and guidelines on how to modify software algorithms to be compatible with hardware/platforms; (3) introduce unique methodologies for design space exploration (DSE), perform DSE considering the constraints/requirements of platforms/applications, and create architectures/accelerators/techniques that are generic, parameterized, and scalable; (4) introduce unique methodologies and create central controller to dynamically map/remap circuitry for essential tasks; (5) introduce customized and reconfigurable architectures and techniques for compute/data-intensive applications to further enhance speed, area, and power, and ultimately create FPGA-based prototyping.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.