FuSe-TG: Reconfigurable Threshold Logic via Flexible Thin Film Electronics: A Pathway to Semiconductor Workforce Development

由于过去二十年来印刷和柔性电子技术的进步，现代电子技术可以形成新颖的可穿戴设备和系统。这些灵活的系统可以促进预防医学、环境监测、低成本供应链管理或智能包装等关键领域的许多进步。我们还能够利用紧凑的逻辑控制器芯片，即所谓的边缘计算元件，它可以变薄并包含在此类设备和系统中，以利用信号处理和无线连接的优势。下一代这些智能可穿戴系统现在必须开发一种能力，结合专门的低功耗和可重构逻辑元件，以充分利用机器学习和人工智能的力量。这些附加的计算元素被称为神经形态计算元素和神经加速器，可以减轻边缘计算所面临的负载，因为数十亿这些可穿戴元素可能会使网络和云计算过载，每个元素都需要远程运行神经推理。在这里，我们建议探索和开发阈值逻辑门（TLGs），可用于构建柔性电子器件的这种神经电路。利用我们在金属氧化物（MOx）薄膜晶体管（tft）和逻辑电路设计方面的专业知识，我们将探索新型tlg，这些tlg将实现可重构，安全和超紧凑的神经形态计算元件，可以解决未来十年真正革命性可穿戴电子产品即将到来的瓶颈。使用柔性电子产品的额外好处是其独特的潜力，可以作为学习，探索和测试集成设备和系统的可访问和“灵活”技术平台。由于在最先进的半导体工程中，这种集成体验在本科阶段不再负担得起或实用，因此柔性电子学可以成为向学生介绍异质集成的真正推动者。因此，我们还计划让社区大学的学生通过一门无障碍的实践课程，接触柔性电子产品，为即将在俄亥俄州中部开设的英特尔芯片工厂培训技术人员和工程师。因此，我们提出了一个新颖而及时的计划，以解决半导体电子的实际和直接需求，这些需求将随着柔性和可穿戴设备的影响而扩大。该提案旨在确定并证明，通过MOx tft在资源受限的灵活系统上实现的边缘计算是开发可重构神经加速器的理想“温床”。它也是激发和吸引工程和技术学位的学生对半导体行业感兴趣的天然平台。为此，我们首先通过迭代计算机建模、TFT工艺优化、SPICE参数化和逻辑电路仿真周期，探索最合适的TLGs电路拓扑和最佳器件参数，以实现有能力的逻辑构建块。这种方法将允许我们逐步获得更稳定和微调的tlg。该迭代回路的产品（即功能强大，稳定和新颖的TFT器件）将在项目的最后阶段投入使用，以实现可应用于自适应和安全逻辑系统设计的六输入可重构TFT示例，以及对设计高效算术单元至关重要的紧凑全加法器电路。第三个要实现的基本电路是一个简单的3XOR人工神经网络，可以说明TLGs的神经形态能力。最后，从这项工作中获得的见解和柔性电子的一般前景将用于引导学生在半导体行业的职业生涯，这将在未来十年扩大。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Modern electronics can form novel wearable devices and systems, thanks to advances in printed and flexible electronics in the last two decades. These flexible systems can facilitate many advances in critical areas such as preventive medicine, environmental monitoring, low-cost supply-chain management, or smart packaging. We have also been able to utilize compact logic controller chips, so-called edge-computing elements, that can be thinned down and included in such devices and systems to take advantage of signal processing and wireless connectivity. The next generation of these smart wearable systems must now develop an ability to incorporate specialized low-power and reconfigurable logic elements that can harness the full power of machine-learning and artificial intelligence. Known as neuromorphic computing elements and neural accelerators, these added computational elements can lessen the load edge-computing will face when billions of these wearable elements could overload the networks and cloud computing, each demanding to run neural inferences otherwise remotely. Here, we propose to explore and develop threshold logic gates (TLGs) that can be utilized to build such neural circuitry for flexible electronics. Using our expertise in metal-oxide (MOx) thin-film transistors (TFTs) and logic circuit design, we will explore novel TLGs that will implement reconfigurable, secure and ultra-compact neuromorphic computing elements that can address the impending bottleneck in truly revolutionary wearable electronics of the next decade. The added benefit of working with flexible electronics is its unique potential to serve as an accessible and ‘flexible’ technology platform to learn, explore and test integrated devices and systems. Since such integral experiences are no longer affordable or practical at the undergraduate level within state-of-the-art semiconductor engineering, flexible electronics can become a true enabler for introducing students to heterogenous integration. Hence, we also plan to expose students in a community college, in prime position to train technicians and engineers for the upcoming Intel chip fab to be opened in central Ohio, to flexible electronics via an accessible and hands-on course to be developed. Thus, we propose a novel and timely program that addresses both practical and immediate needs of semiconductor electronics that will expand with the impact of flexible and wearable devices.The proposal is intended to identify and demonstrate that edge-computing implemented via MOx TFTs on resource-constrained flexible systems is an ideal ‘breeding ground’ for the development of reconfigurable neural accelerators. It is also a natural platform to excite and captivate students of engineering and technician degrees to become interested in the semiconductor industry. To this end, we first explore the most appropriate TLGs circuit topologies as well as optimal device parameters to implement capable logic building blocks by an iterative computer modeling, TFT process refinement, SPICE parameterization and logic circuit simulation cycle. This methodology will allow us to progressively obtain more stable and finely tuned TLGs. Products of this iterative loop (i.e. capable, stable and novel TFT devices) will be put to use in the final phase of the project to implement a six-input reconfigurable TLG example that can be applied to adaptive and secure logic system design, along with a compact full-adder circuit crucial for the design of efficient arithmetic units. The third basic circuit to be implemented is a simple 3XOR artificial neural network that can illustrate TLGs neuromorphic capabilities. Finally, the insights gained from this work and general promise of flexible electronics will be used to usher students to careers in the semiconductor industry that will be expanding in the next decade.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.