Collaborative Research: SHF: Medium: Verifying Deep Neural Networks with Spintronic Probabilistic Computers

该项目解决了验证各种应用中使用的深度神经网络（DNN）的安全性和可靠性的关键需求，例如自动驾驶，飞机控制和智能手机等消费产品。随着人工智能对计算能力的需求不断增长，该项目探索了创新的特定领域架构（DSA），如量子和概率计算平台，作为验证问题的潜在解决方案。该研究的意义在于确保DNN在受到干扰或攻击时的正确运行，其目标是通过提高人工智能（AI）驱动技术的安全性和可信度来造福社会。该跨学科项目不仅将推动DNN验证和节能领域专用计算机领域的发展，还将支持教育和劳动力发展，通过有针对性的活动增加学术界和工业界之间的多样性和合作。该项目旨在使用量子退火和概率计算机解决精确的DNN验证问题，与传统的经典计算方法相比。研究的贡献跨越设备，电路，系统和算法水平。在器件层面，该项目将通过利用压控磁各向异性（VCMA）现象来提高现有概率位（p位）设计的能效。在电路和架构层面，该团队将设计阵列级自旋电子p计算机（即，由p位供电的计算机）并研究反馈电路和p位之间的动态特性，由具有超过1000个p位的缩放互补金属氧化物半导体（CMOS）仿真器（现场可编程门阵列-FPGA）补充。在算法层面，该项目将侧重于制定一个神经网络的精确验证作为一个伊辛模型问题，这将是使用开发的混合经典/概率计算机解决。该项目将为大规模自旋电子概率计算机创造途径，并探索新的研究方向，例如将模拟量子退火算法应用于DNN验证。这项工作将为具有超过100万p位的p计算机奠定基础，该计算机由磁性随机存取存储器（MRAM）技术实现，具有超越验证的深远应用，包括机器学习和量子模拟。该奖项反映了NSF的法定使命，并通过使用基金会的智力价值和更广泛的影响审查标准进行评估，被认为值得支持。

This project addresses the critical need for verifying the safety and reliability of deep neural networks (DNNs) used in various applications, such as autonomous driving, aircraft control, and consumer products like smartphones. As the demand for computational power in artificial intelligence continues to grow, this project explores innovative domain-specific architectures (DSAs) such as quantum and probabilistic computing platforms as potential solutions to the verification problem. The research's significance lies in ensuring the correct functioning of DNNs when exposed to perturbations or attacks, with the goal of benefiting society by enhancing the safety and trustworthiness of Artificial Intelligence (AI)-driven technologies. This interdisciplinary project will not only advance the field of DNN verification and energy-efficient domain-specific computers but also support education and workforce development, increasing diversity and collaboration between academia and industry through targeted activities.The project aims to solve the exact DNN verification problem using quantum annealing and probabilistic computers, contrasting conventional classical computing approaches. The research contributions span device, circuit, system, and algorithm levels. At the device level, the project will improve the energy efficiency of existing probabilistic-bit (p-bit) designs by leveraging the voltage-controlled-magnetic anisotropy (VCMA) phenomenon. At the circuit and architecture level, the team will design array-level spintronic p-computers (i.e., computers powered by p-bits) and investigate the dynamics between the feedback circuitry and p-bits, complemented by scaled complementary metal-oxide semiconductor (CMOS) emulators (Field Programmable Gate Arrays - FPGAs) with more than 1000 p-bits. At the algorithm level, the project will focus on formulating the exact verification of a neural network as an Ising model problem, which will be solved using the developed hybrid classical/probabilistic computers. The project will create pathways for large-scale spintronic probabilistic computers and explore new research directions, such as applying the simulated quantum annealing algorithm for DNN verification. This work will lay the foundations for p-computers with more than one million p-bits, enabled by Magnetic Random Access Memory (MRAM) technology with far-reaching applications beyond verification, including machine learning and quantum simulation.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.