SHF: Small: Redesigning the Memory System in the Era of Compute Express Link

现代计算系统包含各种不同的处理单元，例如中央处理单元(CPU)、图形处理单元(GPU)和专用硬件加速器。这些单元的性能通常由存储系统的容量和带宽决定。虽然双数据速率(DDR)在过去30年里一直是事实上的存储器接口，但技术格局正在发生变化，以适应对存储器系统日益增长的需求。经过几年新互连技术的竞争，Compute Express Link(CXL)正在确立自己的胜利者地位，并被业界广泛采用。CXL处于有利地位，可以改变构建和部署高性能计算系统的方式，部分原因是它的多功能性：可以使用相同的互连技术将处理器与外围设备、专用硬件加速器和内存扩展设备连接起来。推动该项目预期研究的关键观察是，以CXL为中心或CXL扩展的内存系统具有的特征很好地迎合了数据中心和高性能计算环境中普遍存在的工作负载不断增长的内存容量和带宽需求，因此具有在现代数字经济中具有关键商业意义的计算系统的转型潜力。除了有助于改进系统性能和效率的新系统设计外，该项目的活动还将丰富教育活动，向学生群体和未来的劳动力介绍新兴的CXL技术。该项目将调查由CXL实现的新的存储系统组织。研究人员将寻求机会，利用CXL的(I)带宽优势作为带宽受限系统中传统DDR连接内存的潜在替代品；(Ii)能够在多个主机之间有选择地共享分散的内存，以开发通过有效共享公共内存池来提供卓越性能的新架构；以及(Iii)多路传输内存和I/O流量的能力，以提高带宽密集型系统的效率。最后，该项目将调查在存在CXL-DDR混合存储系统时出现的新的容错和数据放置挑战，并开发新的软件和硬件技术来解决这些挑战。该项目的活动将产生研究这类新存储系统的方法，并评估支持CXL的新型存储体系结构，这些体系结构可以提高数据中心和高性能计算环境中使用的商业关键系统的性能、效率和工作负载整合能力。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

Modern computing systems contain a variety of heterogeneous processing units, such as central processing units (CPUs), graphics processing units (GPUs), and specialized hardware accelerators. The performance of these units is often dictated by the memory system’s capacity and bandwidth. While Dual-Data Rate (DDR) has been the de facto memory interface for the last three decades, the technological landscape is changing to accommodate the increasing demands put on the memory system. After several years of competition among new interconnect technologies, Compute Express Link (CXL) is establishing itself as the winner, with widespread industry adoption. CXL is well-positioned to change the way high-performance computing systems are built and deployed, in part due to its versatility: the same interconnect technology can be used to connect processors with peripheral devices, specialized hardware accelerators, and memory expansion devices. The crucial observation driving the project’s intended research is that CXL-centric or CXL-augmented memory systems bear characteristics that cater well to the growing memory capacity and bandwidth demands of workloads prevalent in datacenter and high-performance computing environments, and therefore have transformational potential for computing systems with crucial commercial significance in modern digital economies. In addition to contributing new system designs that improve system performance and efficiency, the project’s activities will enrich educational activities, introducing the student body and future workforce to the emerging CXL technology. The project will investigate new memory system organizations enabled by CXL. The investigators will pursue opportunities in leveraging CXL’s (i) bandwidth superiority as a potential replacement for conventional DDR-attached memory in bandwidth-constrained systems; (ii) ability to enable disaggregated, selectively shareable memory across multiple hosts to develop new architectures that deliver superior performance via effective sharing of a common memory pool; and (iii) ability to multiplex memory and I/O traffic to improve the efficiency of bandwidth-intensive systems. Finally, the project will investigate new fault tolerance and data placement challenges that emerge in the presence of hybrid CXL-DDR memory systems, and develop new software and hardware techniques to address them. The project’s activities will produce methodologies to study such new memory systems, and evaluate novel CXL-enabled memory architectures that improve the performance, efficiency, and workload consolidation capability of commercially crucial systems used in datacenter and high-performance computing environments.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.