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Methodology, Algorithms, and Framework for Hardware Design Understanding

Methodology, Algorithms, and Framework for Hardware Design Understanding
硬件设计理解的方法、算法和框架
批准号:
450387614
负责人:
Professor Dr.-Ing. Görschwin Fey
金额:
$0.0万
依托单位国家:
德国
项目类别:
Research Grants
财政年份:
2020
资助国家:
德国
项目状态:
已结题
起止时间:
2019-12-31 至 2023-12-31

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中文摘要
翻译
理解一个给定的数字系统至少和实现它一样难。这尤其适用于在大型项目中设计的系统,其中没有一个人知道所有的细节,具有不良或过时文档的遗留组件被重用,并且团队成员经常更改。然后,设计师尝试使用各种来源来理解设计的内在逻辑——与团队成员的非正式讨论,需求和规范文档等文本信息,以及源代码和测试用例的审查和执行。本项目致力于支持设计人员以整体的方式理解寄存器传输级别(RTL)系统设计的源代码:我们将研究方法,理论和算法,以指导设计人员通过源代码。为了处理潜在的复杂性并为设计提供简洁的解释,我们将设计一个交互式使用框架,该框架将轻量级指导与自动生成可理解结果的算法相结合。实现我们的方法和底层算法的框架将在来自开源领域的实际设计的不同任务的实证设计研究中进行评估。该项目是突破性的,因为它正式确定了设计理解的方法,从整体上解决了从完整的设计任务到单个步骤的设计理解,并全面评估了实证研究中的实际影响。
英文摘要
Understanding a given digital system is at least as hard as implementing it. Particularly this holds for systems designed in large projects where no single person knows all details, legacy components with poor or outdated documentation are reused, and team members change regularly. Designers then try to understand the inner logic of the design using various sources -- informal discussions with team members, textual information like documents for requirements and specifications, and review as well as execution of source code and test cases.This project strives to support a designer in understanding the source code of a system design at Register Transfer Level (RTL) in a holistic way:We will study methodology, theory, and algorithms to guide a designer through the source code. To handle the underlying complexity and to provide concise explanations for a design, we will devise a framework for interactive usage that combines light-weight guidance with algorithms that automatically derive result which are understandable. The framework implementing our methodology and underlying algorithms will be evaluated in empirical design studies for different tasks on practical designs taken from the open source domain.The project is ground breaking as it formalizes the methodology for design understanding, holistically addresses design understanding starting from a full design task to individual steps, and comprehensively evaluates the practical impact in empirical studies.
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DSy - Debugging Eingebetteter Systeme
  • 批准号:
    165955509
  • 项目类别:
    Independent Junior Research Groups
  • 资助金额:
    $0.0万
  • 财政年份:
    2010
  • 负责人:
    Professor Dr.-Ing. Görschwin Fey
  • 依托单位:
Combining Testing and Monitoring for Online Functional Guarantees in Imprecise Hardware Systems
  • 批准号:
    471837173
  • 项目类别:
    Research Grants
  • 资助金额:
    $0.0万
  • 财政年份:
    --
  • 负责人:
    Professor Dr.-Ing. Görschwin Fey
  • 依托单位:
海外基金