A LOW ENERGY DESIGN METHOD USING MULTI-CONTEXT RECONFIGURATION

可重构计算是具有高度灵活的计算结构的计算机处理。在过去的十年里，随着许多提出的可重构体系结构的发展，这一研究领域出现了复兴。它们中的大多数具有二维逻辑块阵列体系结构，并且它们具有存储两个或更多上下文的存储器。这些设备通过在环境之间快速切换来支持运行时重新配置。然而，与ASIC相比，动态可重构器件通常不被认为是节能的，因为它们使用大量的晶体管来提供可编程性。因此，高功耗成为器件设计中的一个制约因素。由于个人无线通信、电池供电设备和便携式数字应用的快速增长，功率优化引起了越来越多的关注，我们的目标是通过动态重新配置来降低功耗。动态可重构设备使我们能够重新配置…根据当前的使用情况，配置更多的电路。我们设计了较小的电路，如果在原始电路中的某个时间点不使用它们的功能，则可以省略这些电路。我们期望通过重新配置这些较小的电路来实现节能，因为较小的电路的能耗通常较低。在本项目中，我们估算了电路在运行和重新配置时的能耗。然后，将较小电路的能耗与原始电路的能耗进行比较。我们表明，通过重新配置较小的电路来执行可以降低能量消耗。在匹配电路的情况下，功耗平均降低了约71%，而在FIR滤波器的情况下，最大降低了约35%。此外，较小电路的工作频率比原电路高，但很难设计出适用于各种应用的较小电路。我们提出了一种独特的技术来制作基于逻辑门简化的更小的电路。该技术的基本思想是，如果将输入设置为常量，则逻辑门是可减少的。由此产生的电路称为数据相关电路。我们设计与数据相关的电路，并根据使用条件对其进行重新配置；也可以进行自我重新配置。我们将该方法应用于JPEG编码器的DCT模块中。经评估，能耗最高降低约16.5%。较少

Reconfigurable computing is computer processing with highly flexible computing fabrics. In the last decade there was a renaissance in this area of research with many proposed reconfigurable architectures developed. Most of these have a two-dimensional logic block array architecture, and they have a memory that stores two or more contexts. These devices support run-time reconfiguration by rapidly switching between contexts. However, in compared with ASIC, dynamic reconfigurable devices are generally not considered to be power efficient because they use a large number of transistors to provide programmability. Large power consumption therefore becomes a constraining factor in device design. Power optimization has attracted increase attention due to the rapid growth of personal wireless communications, battery powered devices and portable digital applications.It is our aim to reduce the power consumption using dynamic reconfiguration. The dynamic reconfigurable devices enable us to reconf … More igure circuits according to the current usage conditions. We designed smaller circuits that may be omitted if their function is not used at some point in time in the original circuit. We expected that energy savings could be realized by reconfiguration of these smaller circuits, since the energy consumption of the smaller circuits is usually low.In this project, we estimate the energy consumption in the operation and reconfiguration of the circuits. Then, the energy consumption of the smaller circuits is compared with that of the original circuit. We show that execution with reconfiguration the smaller circuits reduces the energy consumption. The energy consumption was reduced by an average of about 71% in the case of matching circuit, and a maximum of about 35% for FIR filters. Moreover, the operating frequency of the smaller circuits is higher than original circuit.However, it is difficult to design smaller circuits that are suitable for various applications. We propose a unique technique to making smaller circuits based on logic gate reduction. The basic idea of this technique is that logic gates are reducible if the input is set to a constant. The resulting circuits are called data-dependent circuits. We design the data-dependent circuits and reconfigure them in accordance with the conditions of usage ; self-reconfiguration is also possible. We apply our method to a DCT module of JPEG encoder. As a result of evaluation, the energy consumption was reduced by a maximum of about 16.5%. Less