Thermoreflectance Microscope (TRM)

为了更好地了解半导体功率器件中的物理过程，特别是在过载条件下（短路，过流），有必要以高的空间和时间分辨率测量芯片温度。测量应该是非侵入性的，以避免人为引入的不均匀性。与基于红外线的方法相比，热反射显微镜可以满足这些要求，并测量芯片正面金属化的温度，而无需事先准备。在关断或短路期间发生的诸如IGBT的双极器件中具有高电流密度的电流细丝可以用这种方法可视化，因为细丝导致芯片上的热“足迹”。到目前为止，这些细丝只能在半导体模拟器中看到，因为它们的空间尺寸非常小，在微米范围内，并且在熄灭之前仅停留在10到100纳秒的位置。首次在真实的结构中观察到这些现象，并对芯片上可能存在的薄弱点进行了定位，这在IGBT短路条件下的测试测量中得到了验证。该研究将有助于功率半导体器件的进一步优化和鲁棒性的提高。在设计中可以避免导致电流拥挤的几何弱点。第一次可以在真实的芯片上分析细丝运动的物理理解。除了双极器件外，还可以研究单极器件，如GaN HEMT或SiC MOSFET。对于SiC MOSFET，在堆垛层错生长后，应使用短脉冲非侵入性地研究热印记。到目前为止，电致发光或光致发光测量的复杂准备是必要的。在短路或雪崩条件下，SiC芯片上的温度不均匀性，这可能会出现在（晶体）缺陷或在过渡到边缘区域，将被调查。为此，热反射显微镜与我们实验室的动态测试台同步。还可以叠加多个测量以提高测量质量（锁定）。GaN器件将被直接测量，以研究在栅极区的陷阱效应。到目前为止，只有动态RDSON的电气测量已经在我们的测试台上进行了。对于特殊的功率循环测试，其工作时间非常短或通过开关损耗进行加热，应研究短加热阶段焊接脚处的温度分布，并为我们提供可能的不均匀性的改进图像。到目前为止，这只能通过最终的失效分析和热机械模拟来假设。在经典的故障分析领域，我们期望在小漏电流的本地化的显着改善。

To better understand the physical processes in semiconductor power devices, especially in overload conditions (short circuit, overcurrent), it is necessary to measure the chip temperature with high spatial and temporal resolution. The measurement should be non-invasive to avoid artificially introduced inhomogeneities. In contrast to infrared-based methods, thermo-reflectance microscopy can meet these requirements and measure the temperature on the front-side metallization of the chips without prior preparation. Current filaments with high current densities in bipolar devices such as IGBTs, which occur during turn-off or short-circuit, can be visualized with this method since the filaments lead to thermal "footprints" on the chip. Until now, these filaments have only been visible in semiconductor simulators because they have very small spatial dimensions in the micrometer range and stay in place only for a few 10 to 100 nanoseconds before extinguishing. For the first time, these phenomena can be observed in real structures and possible weak spots on the chip can be localized, which has already been verified in test measurements on IGBTs under short-circuit condition. This research will contribute to further optimization and robustness improvement of the power semiconductors. Geometric weaknesses leading to current crowding can be avoided in the design. The physical understanding of filament movement can be analyzed on real chips for the first time. In addition to bipolar devices, unipolar devices such as GaN HEMTs or SiC MOSFETs can also be investigated. For SiC MOSFETs, after the growth of stacking faults, the thermal imprint shall be investigated non-invasively with short pulses. Until now, complex preparations for electroluminescence or photoluminescence measurements are necessary. Temperature inhomogeneities on SiC chips in short-circuit or avalanche condition, which can arise at (crystal) defects or at the transition to edge regions, are to be investigated. For this purpose, the thermo-reflectance microscope is synchronized with dynamic test benches in our laboratories. Several measurements can also be superimposed to improve the measurement quality (lock-in). GaN devices will be measured directly to investigate trapping effects in gate regions. So far, only electrical measurements of the dynamic RDSON have been performed on our test benches for this purpose. For special power-cycling tests, which are operated with very short on-times or using heating via switching losses, the temperature distribution at the bond feet during the short heating phases is to be investigated and gives us an improved picture of possible inhomogeneities. So far, this can only be assumed via the final failure analysis and thermo-mechanical simulations. In the field of classical failure analysis, we expect a significant improvement in the localization of small leakage currents.