Optimisation of Probabilistic Deep Learning Approaches for Hardware Acceleration

该项目的重点是研究和开发深度学习中概率模型（如贝叶斯神经网络）在低功耗嵌入式设备（如CPU（中央处理器），NPU（神经处理单元）和FPGA（现场可编程门阵列））上的有效映射方法和近似方案。尽管神经网络加速取得了重大进展，但众所周知，传统的神经网络可能容易过度拟合和泛化能力差-模型无法很好地从训练数据泛化到测试（看不见的）数据。通常的情况是，典型的深度神经网络模型不能提供对不确定性的可靠估计以及它们的预测-它们可能对看不见的数据过于自信。鲁棒不确定性对于现实生活场景很重要-例如，自动驾驶、医疗保健等，其中可以使用不确定性度量作为基础来做出决策。存在大量的研究，通常是在概率框架下，目的是在深度学习中解决这个问题，例如贝叶斯神经网络和深度集成。然而，这些方法通常在计算上是繁琐的。这项研究的目标是提高我们对这些类型的模型的计算方面的理解，并探索整个堆栈（从模型到硬件）的各种优化策略，以便在低功耗嵌入式平台上有效地实现它们-例如CPU，NPU等。

The focus of this project is to investigate and develop methodologies and approximation schemes for the efficient mapping of probabilistic models in deep learning, such as Bayesian Neural Networks, on low-power embedded devices such as CPUs (Central Processing Units), NPUs (Neural Processing Units), and FPGAs (Field Programmable Gate Arrays). Despite the significant progress of neural network acceleration, it is well known that conventional neural networks can be prone to overfitting and poor generalisation - where the model fails to generalise well from the training data to test (unseen) data. It is often the case that typical deep neural network models do not provide reliable estimates of uncertainty alongside their predictions - they can be overconfident on unseen data. Robust uncertainties are important for real-life scenarios - e.g., autonomous driving, healthcare etc., where decisions may be made using uncertainty metrics as a basis. There exists a plethora of research, often under a probabilistic framework, with the aim of tackling this problem in deep learning, such as Bayesian Neural Networks and Deep Ensembles. However, these approaches are often computationally cumbersome. The goal of this research is to improve our understanding of the computational aspects of these types of models and to explore various optimisation strategies across the full stack (from model to hardware) for efficient implementation of them on low-power embedded platforms - e.g. CPU, NPU etc.Area: Artificial intelligence technologies