Advanced methodologies and tools for signal integrity analysis of high-speed electronic systems

近年来，对高频和微型设计的强烈推动一直处于以微电子、电磁(EM)和计算系统为重点的模拟和验证方法的新发展的前沿。随着大规模集成技术的显著进步，在电子芯片和封装层面上，工作频率在GHz范围内迅速上升，通信交换机被设计为传输比特率快于每秒千兆比特的数据。随着对高信号速度的需求不断增加，加上特征尺寸的不断减小，延迟、失真和串扰等信号完整性效应成为限制高速系统整体性能的主要因素。此外，低功耗和增加模拟电路与数字模块的集成度的趋势进一步复杂化了设计和分析过程。然而，目前可用的建模和分析工具/方法不足以应对与高速设计相关的上述新出现的挑战。为了应对这些管理高速模块复杂性的新要求，申请者计划进行新的研究计划。具体而言，这些举措的重点单元如下：(A)高速电子系统的信号完整性分析工具和核查方法。(B)用于分析高速电路、EM、光学和MEMS系统的混合域方法。拟议研究的影响将是促进开发新一代算法和工具，以快速/准确地分析/验证高速模块，从而减少设计周期时间和产品成本。拟议的举措旨在针对各种设计水平的高速应用，包括芯片上IC、多芯片模块、封装、印刷电路板和背板。

During the recent years, the intense drive for high-frequency and miniature designs has been at the forefront of new developments in simulation and verification methodologies focused on microelectronics, electromagnetic (EM) and computing systems. With the significant advances in large-scale integration technology, at both the electronic chip and package level, the operating frequencies are rapidly rising in the GHzs range and communication switches are being designed to transmit data that have bit rates faster than giga-bits per second. With such increasing demands for high signal speeds coupled with the decreasing feature sizes, signal integrity effects such as delay, distortion and crosstalk become the dominant factors limiting the overall performance of high-speed systems. In addition to the above, the trend towards low power consumption and increased integration of analog circuits with digital blocks has further complicated the design and analysis process. However, the currently available modeling and analysis tools/methodologies do not adequately handle the above emerging challenges associated with high-speed designs. To cope with these new requirements of managing the complexity of high-speed modules, the applicant plans to undertake new research initiatives. Specifically, the focused modules of these initiatives are as follows: (a) Signal integrity analysis tools and verification methodologies for high-speed electronic systems. (b) Mixed-domain methodologies for analysis of high-speed circuits, EM, optical and MEMS systems. The impact of the proposed research would be to facilitate the development of new generation algorithms and tools for fast/accurate analysis/validation of high-speed modules, leading to the reduction of design cycle time and the product cost. The proposed initiatives are intended to target high-speed applications in wide range of design levels, including on-chip ICs, multi-chip modules, packages, printed circuit boards and backplanes.