Merged logic-memory architectures and applications

逻辑增强存储器被证明可以改善各种数字系统的功耗、性能和降低成本。除了集成更多功能来构建片上系统（SoC）的明显优势之外，逻辑增强存储器提供的内部存储器带宽需要数十或数百个标准存储器芯片才能匹配。通过更有效地利用内存周期和减少芯片间通信，可以节省电力。我的实验室采用逻辑增强存储器的两种方式是用于单指令流多数据流（SIMD）计算和互联网路由。计算RAM就是这样一种SIMD并行处理器架构，它已经获得了专利，授权给加拿大工业和商业化。对于新的应用程序，将确定此现有体系结构的适用性。将为许多应用程序设计此体系结构的变体。通过与麻省理工学院林肯实验室的合作，我们已经建立了一个三维集成电路，并已被邀请参加他们的3D SOI IC工艺的未来运行。由于衬底与绝缘体上的硅电路没有电连接，因此可以通过蚀刻去除衬底，并且可以将许多晶圆上的电路堆叠在一个小体积中。层与层之间的1.5微米小孔取代了粘合垫的需要。为了充分利用这种新的集成电路技术，需要新的架构。三元内容可寻址存储器（TCAMs）是存储互联网路由表地址前缀和高速搜索它们的一种流行解决方案。在每个单元的存储阵列中添加逻辑时，我们正在评估一种替代方案，该方案需要最优的内存位数（一半加一）来完成相同的任务，需要更少的晶体管，并且执行搜索速度更快。对于互联网主干的高容量路由，我们正在研究一种逻辑增强的内存，它可以并行搜索大量数据包的路由条目。逻辑增强存储器在带宽、功耗和系统性能方面具有优势。

Logic enhanced memories are being shown to improve power consumption, performance and reduce cost of various digital systems.  Beyond the obvious advantage of integrating more functions to build a system on a chip (SoC), logic enhanced memories offer internal memory bandwidths that would require tens or hundreds of standard memory chips to match. Power is saved by making more effective use of memory cycles and reducing inter-chip communication.  Two ways my lab employs logic-enhanced memories are for Single Instruction stream Multiple Data stream (SIMD) computing and for internet routing.     Computational RAM is one such SIMD parallel processor architecture, which has been patented, licenced to Canadian Industry and commercialized.  Suitability of this existing architecture will be determined for new applications.  Variations on this architecture will be designed for a number of applications.     Through a collaboration with MIT Lincoln Labs, we had one 3-dimensional integrated circuit built and have been invited to participate in future runs of their 3D SOI IC process.  Because the substrate is not electrically connected to the silicon-on-insulator circuits, the substrate can be removed through etching and the circuits from many wafers can be stacked in a small volume.  The need for bonding pads is replaced by small 1.5 micrometre vias between layers.  New architectures are required to fully exploit this new IC technology.     Ternary Content Addressable Memories (TCAMs) are a popular solution for storing internet routing table address prefixes and searching them at high speed.  In adding logic into the memory array at each cell, we are evaluating an alternative that requires the optimal number of bits of memory (half plus one) to achieve the same task, requires fewer transistors and performs searches faster.  For high capacity routing in the backbone of the internet, we are investigating a logic-enhanced memory that can search for route entries for a large number of packets in parallel.     Logic enhanced memories have advantages in bandwidth, power consumption and system performance.