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Low-Cost and Low-Power LSI design Methodology optimized for Electron Beam Direct Writing Technique with Merged Memory Circuit

针对具有合并存储器电路的电子束直写技术优化的低成本和低功耗LSI设计方法

基本信息

批准号：
16560317
负责人：
FUJINO Takeshi
金额：
$ 1.86万
依托单位：
Ritsumeikan University
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (C)
财政年份：
2004
资助国家：
日本
起止时间：
2004 至 2005
项目状态：
已结题

项目摘要

Integrated electronic system composed of microprocessors and large memories can be realized as a single chip owing to the progress of micro-fabrication technology of VLSI. These "System On a Chip" are key parts which realize small, low-power, and high-performance system such as mobile phones and digital still cameras.Initial development cost of "System On a Chip" become expensive due to the mask cost. The mask cost for the latest "System On a Chip" becomes more than 1 million dollars. This cost is a critical issue for small-production volume LSI, and the most of the chip cost depends upon the mask cost for "System On a Chip" whose whole-life production volume is less than 10 thousand. Therefore, the new technologies reducing mask cost must be developed for the low-cost "System On a Chip".We adopted EB direct-writing technique as a lithography tool. EB direct-writing is the mask-less technique, then it is free from mask-cost. However, the throughput of EB direct-writing is much lower than that of photo-lithography. Even for the small-volume LSI production, EB direct-writing time have to be shortened. Character-projection EB direct-writing technique is applied in order to increase the throughput.Three key technologies are developed in this study. First, proximity-effect-correction technique using character projection lithography is developed for high-patterning accuracy. Secondly, we proposed novel "Character-build standard cell" design methodology, which realize high throughput EB direct writing. Lastly, via-programmable logic architecture which is' suitable for EB direct-writing is examined. Using these three studies mentioned above, we promote the low-cost technology for small-production volume "System On a Chip".

随着超大规模集成电路微细加工技术的发展，由微处理器和大容量存储器组成的集成电子系统可以在单片上实现。这些“片上系统”是实现移动的电话和数码相机等小型、低功耗、高性能系统的关键部件，由于掩膜成本的原因，“片上系统”的初始开发成本变得昂贵。最新的“系统芯片”的掩模成本超过100万美元。该成本对于小生产量LSI是关键问题，并且大部分芯片成本取决于“片上系统”的掩模成本，其全寿命生产量小于1万。因此，为了实现低成本的“系统级芯片”，必须开发降低掩模成本的新技术。电子束直写技术是一种无掩模技术，因此不需要掩模成本。然而，电子束直写的生产率远低于光刻。即使对于小批量LSI生产，也必须缩短EB直写时间。本研究采用投影电子束直写技术，以提高产能。首先，开发了使用字符投影光刻的邻近效应校正技术以获得高图案化精度。第二，提出了一种新的“标准单元”设计方法，实现了高吞吐量的电子束直写。最后，研究了适合电子束直写的通孔可编程逻辑结构。利用上述三项研究，我们将推动低成本的小批量生产技术“片上系统”。