High-Level Design for FPGAs and Embedded Systems

现场可编程门阵列（FPGA）是可以由最终用户编程以实现任何数字硬件电路的集成电路。FPGA的一个相对较新的用途是计算加速，其中计算算法的部分在CPU上的软件中执行，其他部分在FPGA中实现为硬件加速器。以这种方式加速算法在某些应用的能量效率和/或性能方面提供了超过在处理器上运行的软件的数量级改进。这种混合系统的开发仍然是行业中的挑战，需要将算法手动划分为软件和硬件，以及使用Verilog或VHDL等语言手动编码硬件。这项研究计划旨在通过自动生成混合硬件/软件实现来提高该领域的最新技术水平。*在过去的三年里，申请人的研究小组创建了一个名为LegUp的开源研究框架。它能够自动将用C编程语言编写的计算密集型算法划分为在处理器上运行的软件部分和在FPGA中实现的硬件部分。该系统能够从原始的C代码中自动识别和生产硬件部件，无需人工硬件设计。LegUp通过使用剖析和高级综合算法的组合，从C代码生成硬件电路。* LegUp可在网上获得，并已被全球1,000多个研究小组下载。在拟议的研究中，LegUp工具将得到广泛的增强。一个主题将涉及流电路形式的更快硬件的生成，而不是当前生成的数据路径和控制电路。将增加对业界非常流行的ARM处理器的支持，以便LegUp可以自动生成涉及ARM处理器和硬件加速器的混合系统;目前LegUp仅支持MIP处理器。作为一个长期目标，拟议的研究将尝试从处理器机器代码自动生成硬件加速器，而不是程序的源代码。在这种方法中，在处理器上执行的机器代码的部分将在运行时使用剖析自动识别，以用于硬件加速。这些机器代码将被LegUp反汇编成汇编语言代码，然后编译成Verilog代码，利用LegUp基础设施中已经存在的大部分功能来制造硬件加速器。如果成功的话，这种方法将自动加速在安装了FPGA和LegUp工具的计算机上运行的任何程序。如果主流计算机中包含FPGA，并且安装了LegUp工具，那么即使是家庭和/或办公室计算机的用户也可以访问硬件加速。

Field-programmable gate arrays (FPGAs) are integrated circuits that can be programmed by an end user to implement any digital hardware circuit. A relatively new use of FPGAs is in compute acceleration, where parts of a computational algorithm are executed in software on a CPU and other parts are implemented as hardware accelerators in an FPGA. Accelerating an algorithm in this way offers an order of magnitude improvement over software running on a processor in terms of energy efficiency and/or performance for some applications. The development of such hybrid systems remains a challenge in the industry, requiring manual partitioning of algorithms into software and hardware, and manual coding of hardware using languages like Verilog or VHDL. The research in this proposed Discovery Grant is intended to improve the state-of-the-art in this area by automatically generating hybrid hardware/software implementations.******Over the past three years, the applicant's research group has created an open-source research framework called LegUp. It is able to automatically partition a compute-intensive algorithm written in the C programming language into software parts running on a processor, and hardware parts implemented in an FPGA. The system is able to automatically identify and produce the hardware parts from the original C code, with no manual hardware design. LegUp produces hardware circuits from C code by using a combination of profiling and high-level-synthesis algorithms.***LegUp is available online and has been downloaded by over 1,000 research groups worldwide. In the proposed research, the LegUp tool will be enhanced extensively. One topic will involve the generation of faster hardware in the form of streaming circuits, as opposed to the currently-generated data-path and control circuits. Support will be added for ARM processors, which are very popular in the industry, so that LegUp can produce automatically hybrid systems involving both ARM processors and hardware accelerators; currently LegUp supports only MIPs processors.******As a longer-term goal the proposed research will attempt to automatically generate hardware accelerators from processor machine code, rather than the source code of a program. In this approach, parts of the machine code executing on a processor will be identified automatically using profiling, at run-time, for hardware acceleration. This machine code will be disassembled by LegUp into assembly language code and then compiled into Verilog code to make hardware accelerators, using much of the capability that already exists in the LegUp infrastructure. If successful, this approach would engender the automatic acceleration of any program running on a computer that has an FPGA and the LegUp tools installed. If an FPGA were included in mainstream computers, and the LegUp tools were installed, then even users of home and/or office computers would have access to hardware acceleration.**