Mitigating Software Vulnerabilities with Architectural Support for Type-safety

安全漏洞是由于程序员创建的软件缺陷（即错误）而发生的。 如果被攻击者触发，这些缺陷会导致程序中出现非预期的功能。 在最坏的情况下，这些缺陷可能允许攻击者以受控的方式破坏程序内存中的值。 以前的安全解决方案主要集中在纯软件方法上，这很容易造成高达87%的性能开销。最近为安全性提供架构硬件支持的尝试并不引人注目。 英特尔MPX提供内存访问的硬件边界检查。虽然MPX提供了比纯软件解决方案更好的安全保证，但它的性能并没有更好，仍然会带来20-400%的性能开销。拟议的研究将寻求设计和评估中央处理器（CPU）中的集成硬件/软件安全支持，目标是减少5%的开销。 通过紧密集成解决方案的软件和硬件组件，我们提出了a）以硬件更容易保护免受攻击的方式生成代码的软件工具，以及B）利用诸如缓存和预取之类的机制来加速保护操作的硬件。

Security vulnerabilities occur in because of software defects (i.e. bugs) created by programmers. The defects, if triggered by an attacker, result in unintended functionality in a program. In the worst case, these defects may allow an attacker to corrupt values in program memory in a controlled way. Previous security solutions concentrate largely on software-only approaches, which can easily impose as much as 87% performance overhead. Recent attempts to provide architectural hardware support for security have been less than spectacular. Intel MPX provides hardware bounds checking of memory accesses. While MPX provides better security guarantees than software-only solutions, it performs no better, still imposing anywhere from 20-400% performance overhead.The proposed research will seek to devise and evaluate integrated hardware/software security support in central processing units (CPUs) with an aim of imposing less than 5% overhead. By tightly integrating the software and hardware components of the solution we propose a) software tools that generate code in a way that is easier for hardware to protect against attack and b) hardware that utilizes mechanisms such as caching and pre-fetching to accelerate the protection operations.