Design Challenges of Intrachiplet and Interchiplet Interconnection
Design Challenges of Intrachiplet and Interchiplet Interconnection
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Chiplet 内和 Chiplet 间互连的设计挑战
DOI:
10.1109/mdat.2022.3203005
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发表时间:
2022
影响因子:
2
通讯作者:
Wang, Xiaohang
中科院分区:
文献类型:
--
作者:
Chen, Chixiao;Yin, Jieming;Peng, Yarui;Palesi, Maurizio;Cao, Wenxu;Huang, Letian;Singh, Amit Kumar;Zhi, Haocong;Wang, Xiaohang
This article discusses the challenges in intrachiplet and interchiplet networks, including the need for faster simulation, better architectures, and performance requirements determined by emerging applications.
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DOI:
--
发表时间:
2018
期刊:
International Symposium on Computer Architecture
影响因子:
--
作者:
Jieming Yin;Zhifeng Lin;Onur Kayiran;Matthew Poremba;Muhammad Shoaib Bin Altaf;Natalie D. Enright Jerger;G. Loh
通讯作者:
G. Loh
DOI:
--
发表时间:
2022
期刊:
Design, Automation and Test in Europe
影响因子:
--
作者:
Enrico Russo;M. Palesi;Salvatore Monteleone;Davide Patti;G. Ascia;V. Catania
通讯作者:
V. Catania
影响因子:
6.7
作者:
Imam Al Razi;Quang Le;Tristan M. Evans;Shilpi Mukherjee;H. Mantooth;Yarui Peng
通讯作者:
Yarui Peng
DOI:
--
发表时间:
2010
期刊:
影响因子:
--
作者:
Bewketu Seyoum;B. Bellete
通讯作者:
B. Bellete
DOI:
--
发表时间:
2021
期刊:
Annual International Conference on Nanoscale Computing and Communication
影响因子:
--
作者:
Haocong Zhi;Xianuo Xu;Weijian Han;Zhilin Gao;Xiaohang Wang;M. Palesi;A. Singh;Letian Huang
通讯作者:
Letian Huang